lt3082ets8 Linear Technology Corporation, lt3082ets8 Datasheet - Page 13

• Manufacturer Part Number: lt3082ets8
• Description: 200ma Single Resistor Low Dropout Linear Regulator
• Manufacturer: Linear Technology Corporation

Tables 3 through 5 list thermal resistance as a function
of copper areas in a fi xed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total fi nished board thickness of 1.6mm.
Table 3. DD Package, 8-Lead DFN
*Device is mounted on topside
Table 4. TS8 Package, 8-Lead SOT-23
Table 5. ST Package, 3-Lead SOT-223
*Device is mounted on topside
For further information on thermal resistance and using thermal information,
refer to JEDEC standard JESD51, notably JESD51-12.
APPLICATIONS INFORMATION
*Device is mounted on topside
TOPSIDE*
TOPSIDE*
TOPSIDE*
2500mm
1000mm
2500mm
1000mm
2500mm
1000mm
225mm
100mm
225mm
100mm
225mm
100mm
COPPER AREA
COPPER AREA
COPPER AREA
2
2
2
2
2
2
2
2
2
2
2
2
BACKSIDE
BACKSIDE
BACKSIDE
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
2
2
2
2
BOARD AREA
BOARD AREA
BOARD AREA
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
2
2
2
2
(JUNCTION-TO-AMBIENT)
(JUNCTION-TO-AMBIENT)
(JUNCTION-TO-AMBIENT)
THERMAL RESISTANCE
THERMAL RESISTANCE
THERMAL RESISTANCE
25°C/W
25°C/W
28°C/W
32°C/W
54°C/W
54°C/W
57°C/W
63°C/W
20°C/W
20°C/W
24°C/W
29°C/W
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Please reference
JEDEC standard JESD51-7 for further information on high
thermal conductivity test boards. Achieving low thermal
resistance necessitates attention to detail and careful layout.
Demo circuit 1447A’s board layout using multiple inner
V
performance for the DFN package.
Calculating Junction Temperature
Example: Given an industrial factory application with an
input voltage of 15V ±10%, an output voltage of 12V ±5%,
an output current of 200mA and a maximum ambient
temperature of 50°C, what would be the maximum junc-
tion temperature for a DFN package?
The total circuit power equals:
The SET pin current is negligible and can be ignored.
V
V
I
Power dissipation under these conditions equals:
Junction temperature equals:
In this example, junction temperature is below the maxi-
mum rating, ensuring reliable operation.
OUT
OUT
IN(MAX CONTINUOUS)
OUT(MIN CONTINUOUS)
P
P
T
T
TOTAL
TOTAL
J
J
= 200mA
= T
= 50°C + (1.02W • 30°C/W) = 80.6°C
planes and multiple thermal vias achieves 28°C/W
A
= (V
= (16.5 – 11.4V)(200mA) = 1.02W
+ P
TOTAL
IN
– V
• θ
OUT
= 16.5 (15V + 10%)
= 11.4V (12V – 5%)
JA
)(I
OUT
)
LT3082
13
3082f