lm5027mhx National Semiconductor Corporation, lm5027mhx Datasheet - Page 19

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lm5027mhx

Manufacturer Part Number
lm5027mhx
Description
Voltage Mode Active Clamp Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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Gate Drive Outputs
The LM5027 contains three unique gate drivers. OUTA, the
primary switch driver, is designed to drive the gate of an N-
Channel MOSFET and is capable of sourcing and sinking a
peak current of 2A. The active clamp drive, OUTB, is de-
signed to drive a P-Channel MOSFET and is capable of
sourcing and sinking peak currents of 1A. The third driver,
OUTSR, is designed to drive the gate of a synchronous rec-
tification MOSFET through a gate drive transformer. OUTSR
gate driver has a source and sink capability of 3A.
Driver Delay Timing
The three independent time delay adjustments allow a great
deal of flexibility for the user to optimize the efficiency of the
system. The active clamp output (OUTB) is in phase with the
main output (OUTA), with the active clamp output overlapping
the main output. The overlap time provides dead-time be-
tween the operation of the main switch and the P-Channel
active clamp switch at both the rising and falling edges. The
rising edge control is set by a resistor from the TIME1 pin to
the AGND pin. The falling edge control is set with a resistor
from the TIME3 pin to the AGND pin.
The rising edge of the PWM comparator output coincides with
the rising edge of OUTB and the falling edge of the OUTSR
output without delay, as shown in
control for turning on the OUTSR output after the main output
(OUTA) has turned off is set with a resistor from the TIME2
pin to the AGND pin.
FIGURE 9. LM5027 Driver Output Timing
Figure
9. The rising edge
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Thermal Protection
Internal Thermal Shutdown circuitry is provided to protect the
integrated circuit in the event the maximum rated junction
temperature is exceeded. When activated, typically at 165°C,
the controller is forced into a low power standby state with the
output drivers (OUTA, OUTB, and OUTSR), the bias regula-
tors (VCC and REF) disabled. The thermal protection feature
is provided to prevent catastrophic failures from accidental
device overheating. During a restart, after thermal shutdown,
the soft-start capacitors (SS and SSSR) are fully discharged
and the controller follows a normal start-up sequence after the
junction temperature falls below the Thermal Shutdown hys-
teresis threshold (typically 145°C).
VIN
The voltage applied to the VIN pin, normally the same as the
system voltage applied to the power transformer’s primary
(V
capability of 105V. The current into VIN depends primarily on
the output driver capacitive loads, the switching frequency,
and any external loads on the VCC pin. If the power dissipa-
tion associated with the VIN current exceeds the package
capability, an external voltage should be applied to the VCC
pin (see
The VCC regulation set point voltage is initially internally reg-
ulated to 9.5V. After the first OUTSR pulse, the VCC set point
voltage is reduced to 7.5V. If an external voltage is applied to
the VCC pin the required range is 8V to 15V . The VIN to VCC
series pass regulator includes a parasitic diode between VIN
and VCC. This diode should not be forward biased in normal
operation. The VCC voltage should never exceed the VIN
voltage. It is recommended the circuit of
suppress transients which may occur at the input supply, in
particular where VIN is operated close to the maximum op-
erating rating of the LM5027.
PWR
FIGURE 10. Start-up Regulator Power Reduction
), can vary in the range of the 13 to 90V with transient
Figure
10) to disable the internal start-up regulator.
Figure 10
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be used to
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