lm5072mhx-80 National Semiconductor Corporation, lm5072mhx-80 Datasheet - Page 18

• Manufacturer Part Number: lm5072mhx-80
• Description: Integrated 100v Power Over Ethernet Pd Interface And Pwm Controller With Aux Support
• Manufacturer: National Semiconductor Corporation

www.national.com
may remove power from a port based on the reduction in DC
current. This is commonly known as DC Maintain Power Sig-
nature (DC MPS), a common feature in many PSE systems.
The high voltage startup regulator of the PWM controller does
not have low dropout capability and will not be able to provide
V
(no external V
should supply V
cessful startup.
When using the RAUX configuration, the positive potential
connection of the 0.1 µF signature capacitor should be moved
from VIN to RTN/ARTN as shown in Figure 11. This provides
a high frequency, low impedance path for the IC's substrate
during rear auxiliary operation. Placing the capacitor here will
not affect signature mode.
It should be noted that rear auxiliary non-dominance does not
imply PoE dominance. PoE dominance is difficult to achieve
in any PoE system if continuity of power is desired. When the
PoE voltage appears, the PSE and PD interface must con-
tinue delivering load current in addition to charging the input
capacitor bank from the auxiliary voltage to the PoE voltage.
The situation is further complicated by the fact that for a given
delivered power level, the load current is much higher at the
lower input voltages typically used in auxiliary supplies. As is
the case during any inrush sequence, very high power is dis-
sipated in the hot swap MOSFET. Consequently, attempting
to achieve inrush completion while delivering load current is
highly ill advised. Lastly, current delivered to the system may
be limited by the PSE, the PD, or both.
A Note About FAUX and RAUX Pin
False Input State Detection
The ICL_FAUX and RAUX pins are used to sense the pres-
ence of auxiliary power sources. The input voltage of each pin
must remain low when the auxiliary power sources are ab-
sent. However, the Or-ing diodes feeding the auxiliary power
are not ideal and leak reverse current that can flow from the
PoE input to both the ICL_FAUX and RAUX pins. When PoE
power is applied, these leakage currents may elevate the po-
tentials of the ICL_FAUX and RAUX pins to false logic states.
One of two failure modes may be observed when the power
diode feeding the front auxiliary input leaks excessively. First,
the current may corrupt the inrush current limit programming,
if that feature has been implemented. Second, the leakage
current may elevate the voltage on the pin to the ICL_FAUX
input threshold, which will force UVLO release. This would
certainly interrupt any attempt by the LM5072 PD interface to
perform the signature or classification functions.
When the power diode that feeds the rear auxiliary input
leaks, the false signal could imply a rear auxiliary supply is
present. In this case, the internal hot swap MOSFET will be
turned off. This would of course block PoE power flow and
cause the circuit to prevent startup.
This leakage problem at the control input pins can be easily
solved. As shown in Figure 12, an additional pull-down resis-
tor (Rpd) across each auxiliary power control input provides
a path for the diode leakage current so that it will not create
false states on the ICL_FAUX or RAUX pins.
CC
when the potential from VIN to RTN is less than 14.5V
CC
CC
load). In this case, the auxiliary voltage
directly via diode OR-ing to ensure suc-
18
High Voltage Startup Regulator
The LM5072 contains a startup bias regulator that allows the
VIN pin to be connected directly to PoE network voltages as
high as 100V. The regulator output is connected to the VCC
pin, providing an initial DC bias voltage of 7.7V nominal to
start the PWM controller. The regulator is internally current
limited to no less than 15 mA to prevent excessive power dis-
sipation. For V
pacitor ranging between 0.1 µF to 10 µF is required between
the VCC and ARTN pins. Though the current capability of the
regulator exceeds the requirements of the IC, no external DC
load drawing more than 3 mA should be applied to the output.
A small amount of current for a “Powered from PoE” indicator
LED (see Power Good section) is acceptable. After the DC-
DC converter reaches steady state operation, the V
is typically elevated by an auxiliary winding of the power
transformer. The sustained V
than 8.1V to guarantee the current supplied by the startup
regulator is reduced to zero. Increasing the VCC pin voltage
above the regulation level of the startup regulator automati-
cally disables the regulator, thus reducing the power dissipa-
tion inside the LM5072. The power savings can be significant
as many high voltage MOSFETs require a relatively large
amount of gate charge and the gate drive current adds directly
to the V
A V
to prevent the PWM controller from operating as the V
age rises during startup or falls during shutdown. The PWM
controller is enabled when the V
ceeds 7.6V and disabled when the V
drops below 6.25V.
Error Amplifier
The LM5072 contains a wide-bandwidth, high-gain error am-
plifier to regulate the output voltage in non-isolated applica-
tions. The amplifier’s non-inverting input is set to a fixed
reference voltage of 1.25V, while the inverting input is con-
nected to the FB pin. The open-drain output of the amplifier
is connected to the COMP pin, which is pulled up internally
through a 5 kΩ resistor to an internal 5V bias voltage. Feed-
back loop compensation can be easily implemented by plac-
ing the compensation network, represented by “Zcomp”,
between the FB and COMP pins as shown in Figure 13.
CC
FIGURE 12. Bypassing Resistor – Prevents False
under-voltage lock-out circuit monitors the V
CC
current draw.
ICL_FAUX and RAUX Pin Signaling
CC
voltage stability and noise immunity, a ca-
CC
CC
voltage should be greater
voltage rising edge ex-
CC
voltage falling edge
20184629
CC
CC
voltage
voltage
CC
volt-