lm2742mtcx National Semiconductor Corporation, lm2742mtcx Datasheet - Page 11

• Manufacturer Part Number: lm2742mtcx
• Description: N-channel Fet Synchronous Buck Regulator Controller For Low Output Voltages
• Manufacturer: National Semiconductor Corporation

been reached. R
tion:
For example, a conservative 15A current limit in a 10A design
with a minimum R
tor. Because current sensing is done across the low side FET,
no minimum high side on-time is necessary. In the current
limit mode the LM2727/37 will turn the high side off and the
keep low side on for as long as necessary. The LM2727/37
enters current limit mode if the inductor current exceeds the
current limit threshold at the point where the high side FET
turns off and the low side FET turns on. (The point of peak
inductor current. See .) Note that in normal operation mode
the high side FET always turns on at the beginning of a clock
cycle. In current limit mode, by contrast, the high side FET on
pulse is skipped. This causes inductor current to fall. Unlike
a normal operation switching cycle, however, in a current limit
mode switching cycle the high side FET will turn on as soon
as inductor current has fallen to the current limit threshold.
The LM2727/37 will continue to skip high side FET pulses until
the inductor current peak is below the current limit threshold,
at which point the system resumes normal operation.
Unlike a high side FET current sensing scheme, which limits
the peaks of inductor current, low side current sensing is only
allowed to limit the current during the converter off-time, when
inductor current is falling. Therefore in a typical current limit
plot the valleys are normally well defined, but the peaks are
variable, according to the duty cycle. The PWM error amplifier
and comparator control the off pulse of the high side FET,
even during current limit mode, meaning that peak inductor
current can exceed the current limit threshold. Assuming that
the output inductor does not saturate, the maximum peak in-
ductor current during current limit mode can be calculated
with the following equation:
Where T
200ns term represents the minimum off-time of the duty cycle,
OSC
FIGURE 2. Current Limit Threshold
is the inverse of switching frequency f
R
CS
CS
DSON
can be found by using the following equa-
= R
DSON
of 10mΩ would require a 3.3kΩ resis-
(LOW) * I
LIM
/50µA
OSC
20087550
. The
11
which ensures enough time for correct operation of the cur-
rent sensing circuitry. See the plots entitled Peak Current
During Current Limit in the Typical Performance Characteris-
tics section.
In order to minimize the time period in which peak inductor
current exceeds the current limit threshold, the IC also dis-
charges the soft start capacitor through a fixed 95 µA source.
The output of the LM2727/37 internal error amplifier is limited
by the voltage on the soft start capacitor. Hence, discharging
the soft start capacitor reduces the maximum duty cycle D of
the controller. During severe current limit this reduction in duty
cycle will reduce the output voltage if the current limit condi-
tions last for an extended time. Output inductor current will be
reduced in turn to a flat level equal to the current limit thresh-
old. The third benefit of the soft start capacitor discharge is a
smooth, controlled ramp of output voltage when the current
limit condition is cleared. During the first few nanoseconds
after the low side gate turns on, the low side FET body diode
conducts. This causes an additional 0.7V drop in V
range of V
were 10mΩ and the current through the FET was 10A, V
would be 0.1V. The current limit would see 0.7V as a 70A
current and enter current limit immediately. Hence current
limit is masked during the time it takes for the high side switch
to turn off and the low side switch to turn on.
SHUT DOWN
If the shutdown pin SD is pulled low, the LM2742 discharges
the soft start capacitor through a MOSFET switch. The high
side and low side switches are turned off. The LM2742 re-
mains in this state until SD is released.
DESIGN CONSIDERATIONS
The following is a design procedure for all the components
needed to create the circuit shown in Figure 4 in the Example
Circuits section, a 5V in to 1.2V out converter, capable of de-
livering 10A with an efficiency of 85%. The switching frequen-
cy is 300kHz. The same procedures can be followed to create
many other designs with varying input voltages, output volt-
ages, and output currents.
Input Capacitor
The input capacitors in a Buck switching converter are sub-
jected to high stress due to the input current waveform, which
is a square wave. Hence input caps are selected for their rip-
ple current capability and their ability to withstand the heat
generated as that ripple current runs through their ESR. Input
rms ripple current is approximately:
The power dissipated by each input capacitor is:
Here, n is the number of capacitors, and indicates that power
loss in each cap decreases rapidly as the number of input
caps increase. The worst-case ripple for a Buck converter
occurs during full load, when the duty cycle D = 50%.
In the 5V to 1.2V case, D = 1.2/5 = 0.24. With a 10A maximum
load the ripple current is 4.3A. The Sanyo 10MV5600AX alu-
minum electrolytic capacitor has a ripple current rating of
2.35A, up to 105°C. Two such capacitors make a conserva-
tive design that allows for unequal current sharing between
DS
is normally much lower. For example, if R
www.national.com
DS
. The
DSON
DS