bh616uv8011di-55 Brillance Semiconductor, bh616uv8011di-55 Datasheet

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bh616uv8011di-55

Manufacturer Part Number
bh616uv8011di-55
Description
Ultra Low Power/high Speed Cmos Sram 512k X 16 Bit
Manufacturer
Brillance Semiconductor
Datasheet
n FEATURES
Ÿ Wide V
Ÿ Ultra low power consumption :
Ÿ High speed access time :
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE1, CE2 and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation, no clock, no refresh
Ÿ Data retention supply voltage as low as 1.0V
n POWER CONSUMPTION
n PIN CONFIGURATIONS
R0201-BH616UV8011
Brilliance Semiconductor, Inc.
Detailed product characteristic test report is available upon request and being accepted.
V
V
-55
BH616UV8011AI
CC
CC
G
A
B
C
D
E
F
H
PRODUCT
= 3.6V
= 1.2V
FAMILY
CC
low operation voltage : 1.65V ~ 3.6V
DQ14
DQ15
DQ8
DQ9
VSS
VCC
A18
LB
1
Operation current : 12mA (Max.) at 55ns
Standby current : 2.5uA (Typ.) at 3.0V/25
Data retention current : 1.2uA (Typ.) at 25
55ns (Max.) at V
DQ10
DQ11
DQ12
DQ13
48-ball BGA top view
OE
UB
NC
A8
2
TEMPERATURE
-40
OPERATING
Industrial
O
A17
A14
A12
NC
A0
A3
A5
A9
C to +85
3
Green package materials are compliant to RoHS
Ultra Low Power/High Speed CMOS SRAM
512K X 16 bit
CC
A16
A15
A13
A10
A1
A4
A6
A7
4
=1.65~3.6V
O
C
2mA (Max.) at 1MHz
DQ1
DQ3
DQ4
DQ5
CE1
WE
A11
V
A2
5
CC
15uA
=3.6V
STANDBY
(I
CCSB1
DQ0
DQ2
VCC
VSS
DQ6
DQ7
CE2
NC
6
reserves the right to change products and specifications without notice.
, Max)
V
CC
12uA
=1.8V
O
O
C
C
1MHz
2mA
1
POWER DISSIPATION
n DESCRIPTION
The BH616UV8011 is a high performance, ultra low power CMOS
Static Random Access Memory organized as 524,288 by 16 bits and
operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical operating current of
1.5mA at 1MHz at 3.6V/25
1.65V/85
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH616UV8011 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BH616UV8011 is available in 48-ball BGA package.
n BLOCK DIAGRAM
V
10MHz
CC
DQ15
6mA
DQ0
CE2
CE1
A12
A11
A10
WE
=3.6V
V
OE
UB
V
A9
A8
A7
A6
A5
A4
A3
LB
.
.
.
.
.
.
CC
SS
O
C.
.
.
.
.
.
.
12mA
Address
Buffer
Input
f
Max.
Operating
Control
(I
16
16
CC
, Max)
10
1.5mA
1MHz
O
Output
C and maximum access time of 55ns at
Buffer
Buffer
Data
Input
Data
Decoder
Row
V
10MHz
BH616UV8011
CC
5mA
16
=1.8V
16
1024
A18
8mA
f
A17
Max.
Address Input Buffer
A15
Column Decoder
Memory Array
1024 x 8192
Write Driver
Revision
May
Column I/O
Sense Amp
A14
BGA-48-0608
PKG TYPE
A13
512
9
8192
A16 A2 A1
2006
1.1
A0

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bh616uv8011di-55 Summary of contents

Page 1

Ultra Low Power/High Speed CMOS SRAM 512K X 16 bit Green package materials are compliant to RoHS n FEATURES Ÿ Wide V low operation voltage : 1.65V ~ 3.6V CC Ÿ Ultra low power consumption : V = 3.6V Operation ...

Page 2

PIN DESCRIPTIONS Name A0-A18 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input LB and UB Data Byte Control Input DQ0-DQ15 Data Input/Output Ports ...

Page 3

ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ABSOLUTE ...

Page 4

DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time R 1. Typical characteristics are at T =25 A ...

Page 5

AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVQX E1LQV ACS1 t t E2LQV ACS2 t t BLQV GLQV E1LQX CLZ1 ...

Page 6

READ CYCLE 2 CE1 CE2 D OUT (1, 4) READ CYCLE 3 ADDRESS OE CE1 CE2 LB OUT NOTES high in read Cycle. 2. Device is continuously selected when CE1 = V 3. Address ...

Page 7

AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVWL AVWH ELWH BLWH WLWH WHAX WR1 ...

Page 8

WRITE CYCLE 2 ADDRESS CE1 CE2 LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and CE2 ...

Page 9

ORDERING INFORMATION BH616UV8011 Note: Brilliance Semiconductor Inc. (BSI) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which ...

Page 10

Revision History Revision No. History 1.0 Initial Production Version 1.1 Change I-grade operation temperature range - from –25 O R0201-BH616UV8011 C to – BH616UV8011 Draft Date Remark May 10,2006 Initial May. 25, 2006 Revision 1.1 May ...

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