W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 153

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W83697HFFDC

Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
10.6 Logical Device 1 (Parallel Port)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0x78 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x07 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x04)
CRF0 (Default 0x3F)
These two registers select Parallel Port I/O base address.
[0x100:0xFFC] on 4 byte boundary (EPP not supported) or
[0x100:0xFF8] on 8 byte boundary (all modes supported, EPP is only available when the base
address is on 8 byte boundary).
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for Parallel Port.
Bit 7 - 3 : Reserved.
Bit 2 - 0 : These bits select DRQ resource for Parallel Port.
Bit 7
Bit 6 - 3 : ECP FIFO Threshold.
Bit 2 - 0 : Parallel Port Mode (CR28 PRTMODS2 = 0)
= 1
= 0
000=DMA0
001=DMA1
010=DMA2
011=DMA3
100 – 111= No DMA active
: Reserved.
= 100
= 000
= 001
= 101
= 010
= 011
= 111
Activates the logical device.
Logical device is inactive.
Printer Mode (Default)
Standard and Bi-direction (SPP) mode
EPP - 1.9 and SPP mode
EPP - 1.7 and SPP mode
ECP mode
ECP and EPP - 1.9 mode
ECP and EPP - 1.7 mode.
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Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70

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