a8292 Allegro MicroSystems, Inc., a8292 Datasheet - Page 15

• Manufacturer Part Number: a8292
• Description: Dual Lnb Supply And Control Voltage Regulator
• Manufacturer: Allegro MicroSystems, Inc.

A8292
Status Registers
The main fault conditions: overcurrent (OCP), under voltage
(VUV) and overtemperature (TSD), are all indicated by setting
the relevant bits in the Status registers. In all fault cases, once the
bit is set, it remains latched until the A8292 is read by the I
master, assuming the fault has been resolved.
bit, DIS, for that channel. A DIS bit is set when either a fault occurs
or if the LNB is disabled intentionally. These bits are latched and
are reset when the LNB is commanded on again. The power not
good (PNG), tone detect (TDET), and cable disconnected (CAD)
flags are the only bits which may be reset without an I
sequence. Table 5 summarizes the condition of each bit when set
and how it is reset.
it is necessary to have two Status registers. When performing a
The current status of each LNB output is indicated by the disable
As the A8292 has a comprehensive set of status reporting bits,
Table 5. Status Register Bit Setting
TDET1, TDET2
OCP1, OCP2
PNG1, PNG2
CAD1, CAD2
DIS1, DIS2
Status Bit
(I
TSD
VUV
2
C™-Compatible Read Register)
Dual LNB Supply and Control Voltage Regulator
Cable disconnected
LNB disabled, either intentionally or
due to fault
Overcurrent
Power not good
Tone detect
Thermal shutdown
Undervoltage
Function
2
C™ read
2
C™
multiple read function, register 1 is read followed by register 2,
then register 1 again and so on. Whenever a new read function is
performed, register 1 is always read first.
to detect the fault by reading the Status registers, then rereading
the Status registers until the status bit is reset indicating the fault
condition is reset. The fault may be detected either by continuously
polling, by responding to an interrupt request (IRQ), or by detecting
a fault condition externally and performing a diagnostic poll of all
slave devices. Note that the fully-operational condition of the Status
registers is all 0s, to simplify checking of the Status bit.
The normal sequence of the master in a fault condition will be
Non-latched
Non-latched
Non-latched
Latched
Latched
Latched
Latched
Set
Cable disconnect test off or cable
connected
LNB enabled and no fault
I
LNB volts in range
Tone removed
I
I
2
2
2
C™ read and fault removed
C™ read and fault removed
C™ read and fault removed
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
Condition
Reset
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