sc4609mltrt Semtech Corporation, sc4609mltrt Datasheet - Page 11

• Manufacturer Part Number: sc4609mltrt
• Description: Sc4609 Low-input, Mhz Operation, High-efficiency Synchronous Buck
• Manufacturer: Semtech Corporation

For a low voltage and high output current application such
as the 3.3V/1.5V@12A case, the conduction loss is of-
ten dominant and selecting low R
ticeably improve the efficiency of the converter even
though they give higher switching losses.
The gate charge loss portion of the top/bottom MOSFET’s
total power loss is derived from the SC4609. This gate
charge loss is based on certain operating conditions (f
V
The thermal estimations have to be done for both
MOSFETs to make sure that their junction temperatures
do not exceed their thermal ratings according to their
total power losses P
thermal resistance
Loop Compensation Design
For a DC/DC converter, it is usually required that the
converter has a loop gain of a high cross-over frequency
for fast load response, high DC and low frequency gain
for low steady state error, and enough phase margin for
its operating stability. Often one can not have all these
properties at the same time. The purpose of the loop
compensation is to arrange the poles and zeros of the
compensation network to meet the requirements for a
specific application.
The SC4609 has an internal error amplifier and requires
the compensation network to connect among the COMP
pin and VSENSE pin, GND, and the output as shown in
Figure 4. The compensation network includes C1, C2,
R1, R7, R8 and C9. R9 is used to program the output
voltage according to
POWER MANAGEMENT
Application Information (Cont.)
GATE
2006 Semtech Corp.
, and I
O
).
T
TOTAL
R
V
J
(max)
O
JA
, ambient temperature T
as follows:
0
5 .
T
A
1 (
P
R
TOTAL
R
R
DS(ON)
JA
7
9
)
MOSFETs will no-
A
and their
s
,
11
Figure 4. Compensation network provides 3 poles and
2 zeros.
For voltage mode step down applications as shown in
Figure 4, the power stage transfer function is:
Where:
R = load resistance and
R
The compensation network will have the characteristic
as follows:
Where
C
= C
4
’s ESR.
G
COMP
G
VD
(
(
) s
) s
Z
I
2
P
1
Z
V
R
s
1
R (
I
I
7
1
R
7
1
1
C
1
R
(
1
C
s
1
1
C
1
R
L
1
1
R
1
1
C
1
R
s
s
8
C
Z
P
)
1
1
2
C
C
C
2
s
1
s
C
2
2
C
)
2
1
1
9
L
4
1
C
4
s
Z
s
P
SC4609
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