sc4609mltrt Semtech Corporation, sc4609mltrt Datasheet - Page 12

• Manufacturer Part Number: sc4609mltrt
• Description: Sc4609 Low-input, Mhz Operation, High-efficiency Synchronous Buck
• Manufacturer: Semtech Corporation

After the compensation, the converter will have the fol-
lowing loop gain:
Where:
G
V
The design guidelines for the SC4609 applications are
as following:
The compensated loop gain will be as given in Figure 5:
Figure 5. Asymptotic diagrams of power stage and its
loop gain
POWER MANAGEMENT
Application Information (Cont.)
( T
M
PWM
) s
2006 Semtech Corp.
= 1.0V, ramp peak to valley voltage of SC4609
1. Set the loop gain crossover corner frequency
2. Place an integrator at the origin to increase DC
3. Select
4. Cancel the zero from C
5. Place a high frequency compensator pole p
for given switching corner frequency
and low frequency gains.
obtaining a wide bandwidth.
pole
= f
ing ripple and high frequency noise with the adequate
phase lag at
G
= PWM gain
-20dB/dec rate to go across the 0dB line for
PWM
O
to damp the peaking and the loop gain has a
s
) to get the maximum attenuation of the switch-
G
Gvd
0dB
T
COMP
P1
Power stage
(
(
) s
P1
Z1
G
=
and
VD
ω
C
(
-
Z1
.
) s
ESR
ω
P
V
Z2
o
2
1
= 1/( R
M
such that they are placed near
ω
s
Z2
R
I
V
8
ω
c
I
1
4
’s ESR by a compensator
Loop gain
C
1
1
C
ω
C
ESR
9
4
)).
ω
s
s
Z
P
p1
1
1
-
1
1
ω
p2
s
Z
s
P
2
2
S
1
= 2pfs,
1
s
L
R
R
1
C
s
1
2
s
C
( p
2
L
4
1
C
C
2
12
Layout Guidelines
In order to achieve optimal electrical, thermal and noise
performance for high frequency converters, special at-
tention must be paid to the PCB layouts. The goal of lay-
out optimization is to identify the high di/dt loops and
minimize them. The following guideline should be used to
ensure proper functions of the converters.
1. A ground plane is recommended to minimize noises
2. Start the PCB layout by placing the power compo-
3. The Vcc bypass capacitor should be placed next to
4. The trace connecting the feedback resistors to the
5. Minimize the traces between DRVH/DRVL and the
6. Minimize the loop including input capacitors, top/bot-
7. ISET and PHASE connections to the top MOSFET for
8. Maximize the trace width of the loop connecting the
9. Connect the ground of the feedback divider and the
and copper losses, and maximize heat dissipation.
nents first. Arrange the power circuit to achieve a
clean power flow route. Put all the connections on
one side of the PCB with wide copper filled areas if
possible.
the Vcc and GND pins.
output should be short, direct and far away from the
noise sources such as switching node and switching
components.
gates of the MOSFETs to reduce their impedance to
drive the MOSFETs.
tom MOSFETs. This loop passes high di/dt current.
Make sure the trace width is wide enough to reduce
copper losses in this loop.
current sensing must use Kelvin connections.
inductor, bottom MOSFET and the output capacitors.
compensation components directly to the GND pin
of the SC4609 by using a separate ground trace.
Then connect this pin to the ground of the output
capacitor as close as possible
SC4609
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