attiny11 ATMEL Corporation, attiny11 Datasheet - Page 44

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attiny11

Manufacturer Part Number
attiny11
Description
8-bit Microcontroller With 1k Byte Flash
Manufacturer
ATMEL Corporation
Datasheet

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44
ATtiny11/12
1. In the same operation, write a logical one to WDTOE and WDE. A logical one
2. Within the next four clock cycles, write a logical 0 to WDE. This disables the
• Bits 2..0 - WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1 and 0
The WDP2, WDP1 and WDP0 bits determine the Watchdog Timer prescaling when the
Watchdog Timer is enabled. The different prescaling values and their corresponding
time-out periods are shown in Table 19.
Table 19. Watchdog Timer Prescale Select
Note:
WDP2
0
0
0
0
1
1
1
1
must be written to WDE even though it is set to one before the disable operation
starts.
watchdog.
The frequency of the Watchdog Oscillator is voltage dependent as shown in the section
“ATtiny11 Typical Characteristics” on page 62.
The WDR – Watchdog Reset – instruction should always be executed before the Watch-
dog Timer is enabled. This ensures that the reset period will be in accordance with the
Watchdog Timer prescale settings. If the Watchdog Timer is enabled without reset, the
Watchdog Timer may not start counting from zero.
To avoid unintentional MCU resets, the Watchdog Timer should be disabled or reset
before changing the Watchdog Timer Prescale Select.
WDP1
0
0
1
1
0
0
1
1
WDP0
0
1
0
1
0
1
0
1
Number of WDT
Oscillator cycles
16K cycles
32K cycles
64K cycles
128K cycles
256K cycles
512K cycles
1,024K cycles
2,048K cycles
Typical
Time-out at
V
0.15s
0.30s
9.6s
0.60s
1.2s
2.4s
4.8s
19s
CC
= 2.0V
Typical
Time-out at
V
47 ms
94 ms
0.19 s
0.38 s
0.75 s
1.5 s
3.0 s
6.0 s
CC
= 3.0V
1006F–AVR–06/07
15 ms
30 ms
Typical
Time-out at
V
60 ms
0.12 s
0.24 s
0.49 s
0.97 s
1.9 s
CC
= 5.0V

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