mb90f345caspfv Fujitsu Microelectronics, Inc., mb90f345caspfv Datasheet - Page 14

• Manufacturer Part Number: mb90f345caspfv
• Description: 16-bit Proprietary Microcontroller Cmos 2 F2mc-16lx Mb90340 Series
• Manufacturer: Fujitsu Microelectronics, Inc.

14
MB90340 Series
LQFP100*
95 to 98
99 to 2
92
93
94
3
Pin No.
2
QFP100*
97 to 100
1 to 4
94
95
96
5
1
PPG9,PPGB,
PPGD,PPGF
P20 to P23
A16 to A19
P24 to P27
A20 to A23
Pin name
IN0 to IN3
SOT4
SCK4
AD13
AD14
AD15
SIN4
ALE
P15
P16
P17
P30
IN4
Circuit
type
G
G
G
G
G
G
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data input pin for UART4 (EVA devices)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data output pin for UART4 (EVA devices)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Clock I/O pin for UART4 (EVA devices only)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
Output pins for A16 to A19 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A16 to A19).
Output pins for PPGs
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
Output pins for A20 to A23 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A20 to A23).
Data sample input pins for input captures ICU0 to ICU3
General purpose I/O.The register can be set to select whether
to use a pull-up resistor.This function is enabled in single-chip
mode.
Address latch enable output pin. This function is enabled when
the external bus is enabled.
Data sample input pin for input capture ICU4
Function
(Continued)