c8051t623-g Silicon Laboratories, c8051t623-g Datasheet - Page 116
c8051t623-g
Manufacturer Part Number
c8051t623-g
Description
Full Speed Usb Eprom Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T623-G.pdf
(247 pages)
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USB Register Definition 18.4. INDEX: USB0 Endpoint Index
USB Register Address = 0x0E
18.4. USB Clock Configuration
USB0 is capable of communication as a Full or Low Speed USB function. Communication speed is
selected via the SPEED bit in SFR USB0XCN. When operating as a Low Speed function, the USB0 clock
must be 6 MHz. When operating as a Full Speed function, the USB0 clock must be 48 MHz. Clock options
are described in Section “16. Oscillators and Clock Selection” on page 86. The USB0 clock is selected via
SFR CLKSEL (see SFR Definition 16.1).
Clock Recovery circuitry uses the incoming USB data stream to adjust the internal oscillator; this allows
the internal oscillator to meet the requirements for USB clock tolerance. Clock Recovery should be used in
the following configurations:
When operating USB0 as a Low Speed function with Clock Recovery, software must write 1 to the CRLOW
bit to enable Low Speed Clock Recovery. Clock Recovery is typically not necessary in Low Speed mode.
Single Step Mode can be used to help the Clock Recovery circuitry to lock when high noise levels are pres-
ent on the USB network. This mode is not required (or recommended) in typical USB environments.
Name
Reset
Bit
7:4
3:0
Type
Bit
EPSEL[3:0]
Unused
Name
R
7
0
Communication Speed
Unused. Read = 0000b. Write = don’t care.
Endpoint Select Bits.
These bits select which endpoint is targeted when indexed USB0 registers are
accessed.
0000: Endpoint 0
0001: Endpoint 1
0010: Endpoint 2
0011-1111: Reserved.
R
6
0
Low Speed
Full Speed
R
5
0
C8051T622/3 and C8051T326/7
Rev. 1.1
R
4
0
Function
Internal Oscillator / 8
Internal Oscillator
3
0
USB Clock
2
0
EPSEL[3:0]
R/W
1
0
0
0
123
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