cop87l84cf ETC-unknow, cop87l84cf Datasheet
cop87l84cf
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cop87l84cf Summary of contents
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... ROM design. Lower cost pin and software compat- ible 16k ROM versions are available (COP888CF) as well as a range of COP8 software and hardware development tools. Device Memory (bytes) COP87L84CF 16k OTP EPROM COP87L88CF 16k OTP EPROM Key Features n A/D converter (8-bit, 8-channel, with prescaler and both ...
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Block Diagram www.national.com FIGURE 1. Block Diagram 2 DS101134-1 ...
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... See NS Plastic Chip Package Number V44A See NS Molded Package Number N40A Note Crystal Oscillator -E = Halt Mode Enable Dual-In-Line Package DS101134-2 Top View Order Number COP87L84CFN-XE or COP87L84CFM-XE See NS Package Number N28B or M28B Dual-In-Line Package DS101134-4 Top View Order Number COP87L84CFN-XE, FIGURE 2 ...
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Connection Diagrams (Continued) Pinouts for 28-, 40-, and 44-Pin Packages Port Type Alt. Fun L0 I/O MIWU L1 I/O MIWU L2 I/O MIWU L3 I/O MIWU L4 I/O MIWU L5 I/O MIWU L6 I/O MIWU L7 I/O MIWU G0 I/O ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin −0. Electrical Characteristics −40˚C T +85˚C unless ...
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DC Electrical Characteristics −40˚C T +85˚C unless otherwise specified A Parameter All others Maximum Input Current without Latchup (Note 9) RAM Retention Voltage Input Capacitance Load Capacitance on D2 Note 2: Rate of voltage change must be less ...
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A/D Converter Specifications = 5V ± V 10% (V − 0.050V) Any Input CC SS Parameter Resolution Reference Voltage Input Absolute Accuracy Non-Linearity Differential Non-Linearity Input Reference Resistance Common Mode Input Range (Note 10) DC Common Mode Error Off Channel ...
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Typical Performance Characteristics Halt — Dynamic — (Crystal Clock Option) Port L/C/G Push-Pull Source Current www.national.com (−40˚C to +85˚C) Idle — (Crystal Clock Option) DS101134-29 Port L/C/G Weak Pull-Up Source Current ...
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Typical Performance Characteristics Port D Source Current DS101134-35 Pin Descriptions V and GND are the power supply pins and AGND are the reference voltage pins for the REF on-board A/D converter. CKI is the clock input. This can ...
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Pin Descriptions (Continued) Port 8-bit port with 5 I/O pins (G0, G2–G5), an input pin (G6), and two dedicated output pins (G1 and G7). Pins G0 and G2–G6 all have Schmitt Triggers on their inputs. Pin G1 ...
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Functional Description (Continued) with the timers (with the exception of the IDLE timer). Data memory is addressed directly by the instruction or indirectly by the B, X and SP pointers. The device has 128 bytes of RAM. Sixteen bytes of ...
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Oscillator Circuits (Continued) TABLE 1. Crystal Oscillator Configuration CKI Freq ( (pF) (pF) (MHz 30– 30– 200 100–150 0.455 TABLE 2. R/C Oscillator Configuration, ...
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Timers (Continued) The IDLE Timer T0 can generate an interrupt when the thir- teenth bit toggles. This toggle is latched into the T0PND pending flag, and will occur every the maximum = 1 µs). A control flag ...
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Timers (Continued) FIGURE 9. Timer in External Event Counter Mode Mode 3. Input Capture Mode The device can precisely measure external frequencies or time external events by placing the timer block, Tx, in the in- put capture mode. In this ...
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Timers (Continued) The timer mode control bits (TxC3, TxC2 and TxC1) are detailed below: Mode TxC3 TxC2 TxC1 ...
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Power Save Modes (Continued) IDLE MODE The device is placed in the IDLE mode by writing a “1” to the IDLE flag (G6 data bit). In this mode, all activity, except the associated on-board oscillator circuitry, the WATCHDOG logic, the ...
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Multi-Input Wakeup (Continued) FIGURE 11. Multi-Input Wake Up Logic The GIE (global interrupt enable) bit enables the interrupt function. A control flag, LPEN, functions as a global interrupt enable for Port L interrupts. Setting the LPEN flag will enable interrupts ...
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A/D Converter (Continued) A/D Control Register A control register, Reg: ENAD, contains 3 bits for channel se- lection, 3 bits for prescaler selection, and 2 bits for mode se- lection. An A/D conversion is initiated by writing to the ENAD ...
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A/D Converter (Continued) sist of 1 cycle at the beginning for reset, 2 cycles for sam- pling, 8 cycles for converting, and 1 cycle for loading the re- sult into the A/D result register (ADRSLT). This A/D result register is ...
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Interrupts (Continued) MASKABLE INTERRUPTS All interrupts other than the Software Trap are maskable. Each maskable interrupt has an associated enable bit and pending flag bit. The pending bit is set to 1 when the interrupt condition occurs. The state of ...
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Interrupts (Continued) address stored on the stack, and restores that address to the program counter. Program execution then proceeds with the next instruction that would have been executed had there been no interrupt. If there are any valid interrupts pending, ...
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Interrupts (Continued) Arbitration Source Ranking (1) Highest Software Reserved (2) External (3) Timer T0 (4) Timer T1 (5) Timer T1 (6) MICROWIRE/PLUS Reserved Reserved Reserved (7) Timer T2 (8) Timer T2 Reserved Reserved (9) Port L/Wakeup (10) Lowest Default Note ...
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Interrupts (Continued) DS101134-29 FIGURE 14. VIS Operation DS101134-30 FIGURE 15. VIS Flowchart 23 www.national.com ...
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Interrupts (Continued) Programming Example: External Interrupt PSW =00EF CNTRL =00EE RBIT 0,PORTGC RBIT 0,PORTGD SBIT IEDG, CNTRL SBIT EXEN, PSW SBIT GIE, PSW WAIT: JP WAIT . . . .=0FF VIS . . . .=01FA .ADDRW SERVICE . . INT_EXIT: ...
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Interrupts (Continued) NON-MASKABLE INTERRUPT Pending Flag There is a pending flag bit associated with the non-maskable interrupt, called STPND. This pending flag is not memory- mapped and cannot be accessed directly by the software. The pending flag is reset to ...
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WATCHDOG The device contains a WATCHDOG and clock monitor. The WATCHDOG is designed to detect the user program getting stuck in infinite loops resulting in loss of program control or “runaway” programs. The Clock Monitor is used to detect the ...
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WATCHDOG Operation (Continued) TABLE 6. WATCHDOG Service Actions Key Window Data Data Match Match Don’t Care Mismatch Mismatch Don’t Care Don’t Care Don’t Care WATCHDOG AND CLOCK MONITOR SUMMARY The following salient points regarding the WATCHDOG and CLOCK MONITOR should ...
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MICROWIRE/PLUS (Continued) FIGURE 16. MICROWIRE/PLUS Block Diagram The shift clock can be selected from either an internal source or an external source. Operating the MICROWIRE/PLUS ar- rangement with the internal clock source is called the Master mode of operation. Similarly, ...
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MICROWIRE/PLUS (Continued) MICROWIRE/PLUS Slave Mode Operation In the MICROWIRE/PLUS Slave mode of operation the SK clock is generated by an external source. Setting the MSEL bit in the CNTRL register enables the SO and SK functions onto the G Port. ...
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Addressing Modes The device has ten addressing modes, six for operand ad- dressing and four for transfer of control. OPERAND ADDRESSING MODES Register Indirect This is the “normal” addressing mode. The operand is the data memory addressed by the B ...
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Instruction Set (Continued) INSTRUCTION SET ADD A,Meml ADD ADC A,Meml ADD with Carry SUBC A,Meml Subtract with Carry AND A,Meml Logical AND ANDSZ A,Imm Logical AND Immed., Skip if Zero OR A,Meml Logical OR XOR A,Meml Logical EXclusive OR IFEQ ...
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Instruction Set (Continued) JSRL Addr. Jump SubRoutine Long JSR Addr Jump SubRoutine JID Jump InDirect RET RETurn from subroutine RETSK RETurn and SKip RETI RETurn from Interrupt INTR Generate an Interrupt NOP No OPeration www.national.com [SP] PL, [SP−1] PU,SP−2, PC ...
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Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes). Most single byte instructions take one cycle time to execute. Skipped instructions require x number of cycles to be skipped, where x equals the ...
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Instruction Execution Time www.national.com (Continued) Nibble Lower 34 ...
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Development Tools Support OVERVIEW National is engaged with an international community of inde- pendent 3rd party vendors who provide hardware and soft- ware development tool support. Through National’s interac- tion and guidance, these tools cooperate to form a choice of ...
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... COP8-NSEVAL COP8-NSEVAL COP8-NSASM COP8-NSASM COP8-MLSIM COP8-MLSIM COP8-NSDEV COP8-NSDEV COP8-EPU Not available for this device COP8-DM Contact MetaLink Development COP87L84CF Devices COP87L88CF IM-COP8 Contact MetaLink MetaLink COP8-EPU Not available for this device COP8-DM DM4-COP8-888CF (10 MHz), plus PS-10, plus DM-COP8/xxx (ie. 28D) DM Target MHW-CONV39 Adapters ...
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Development Tools Support WHERE TO GET TOOLS Tools are ordered directly from the following vendors. Please go to the vendor’s web site for current listings of distributors. Vendor Home Office Aisys U.S.A.: Santa Clara, CA 1-408-327-8820 fax: 1-408-327-8830 Byte Craft ...
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... Physical Dimensions inches (millimeters) unless otherwise noted www.national.com Molded SO Wide Body Package (M) Order Number COP87L84CFM-XE NS Package Number M28B Molded Dual-In-Line Package (N) Order Number COP87L84CFN-XE NS Package Number N28B 38 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number COP87L88CFN-XE NS Package Number N40A Plastic Leaded Chip Carrier (V) Order Number COP87L88CFV-XE NS Package Number V44A 39 www.national.com ...
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LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support ...