cop888gd National Semiconductor Corporation, cop888gd Datasheet
cop888gd
Related parts for cop888gd
cop888gd Summary of contents
Page 1
... COP888GD 8-Bit CMOS ROM Based Microcontrollers with 16k Memory and 8-Channel A/D General Description The COP888GD ROM based microcontrollers are highly integrated COP8 ™ Feature core devices with 16k memory and advanced features including an A/D Converter. These multi-chip CMOS devices are suited for applications requir- ing a full featured controller with an 8-bit A/D converter, and as pre-production devices for a masked ROM design ...
Page 2
... Block Diagram Connection Diagrams www.national.com FIGURE 1. Block Diagram Plastic Chip Carrier Top View Order Number COP888GD-XXXV, COP988GD-XXX/V See NS Plastic Chip Package Number V44A FIGURE 2. Connection Diagrams 2 DS100076-32 DS100076-33 ...
Page 3
Connection Diagrams (Continued) Pinouts for 44-Pin Package Port ...
Page 4
Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin Total Current into V Pin CC DC Electrical Characteristics −0˚C ...
Page 5
DC Electrical Characteristics −0˚C T +70˚C unless otherwise specified A Parameter All others Maximum Input Current without Latchup (Note 7) (Note 9) RAM Retention Voltage Input Capacitance Load Capacitance on D2 Note Instruction Cycle Time ...
Page 6
AC Electrical Characteristics Note 12: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V and outputs driven low but not connected to a ...
Page 7
Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin Total Current into V Pin CC DC Electrical Characteristics −40˚C ...
Page 8
DC Electrical Characteristics −40˚C T +85˚C unless otherwise specified A Parameter All others Maximum Input Current without Latchup (Note 7) (Note 9) RAM Retention Voltage Input Capacitance Load Capacitance Electrical Characteristics −40˚C T +85˚C unless ...
Page 9
A/D Converter Specifications ± 10%, (V –0.050V) Any Input CC SS Parameter Resolution Absolute Accuracy Non-Linearity Differential Non-Linearity Common Mode Input Range DC Common Mode Error Off Channel Leakage Current On Channel Leakage Current A/D Clock Frequency ...
Page 10
Typical Performance Characteristics www.national.com (−55˚ +125˚C) A DS100076-19 DS100076-21 DS100076-23 10 DS100076-20 DS100076-22 ...
Page 11
Pin Descriptions V and GND are the power supply pins. All V CC pins must be connected. CKI is the clock input. This can come from an R/C generated oscillator crystal oscillator (in conjunction with CKO). See Oscillator ...
Page 12
Pin Descriptions (Continued) Port 8-bit output port that is preset high when RESET goes low. The user can tie two or more D port outputs (except D2) together in order to get a higher drive. Note: Care ...
Page 13
Data Memory Segment RAM Extension (Continued) * Reads as all ones. FIGURE 5. RAM Organization The 128 bytes of RAM contained in the base segment are split between the lower and upper base segments. The first 112 bytes of RAM ...
Page 14
Oscillator Circuits (Continued) DS100076-38 DS100076-39 FIGURE 7. Crystal and R/C Oscillator Diagrams TABLE 1. Crystal Oscillator Configuration CKI Freq ( (pF) (pF 30– 30– ...
Page 15
CONTROL REGISTERS T2ENB Timer T2 Interrupt Enable for Timer Underflow or T2B Input capture edge T3CNTRL Register (Address X'00B6) T3C3 T3C2 T3C1 T3C0 T3PNDA T3ENA Bit 7 The T3CNTRL control register contains the following bits: T3C3 Timer T3 mode control ...
Page 16
Timers (Continued) FIGURE 8. Functional Block Diagram for Idle Timer T0 TIMER T1, TIMER T2 AND TIMER T3 The device has a set of three powerful timer/counter blocks, T1, T2 and T3. The associated features and functioning of a timer ...
Page 17
Timers (Continued) FIGURE 9. Timer in PWM Mode Mode 2. External Event Counter Mode This mode is quite similar to the processor independent PWM mode described above. The main difference is that the timer, Tx, is clocked by the input ...
Page 18
Timers (Continued) The timer mode control bits (TxC3, TxC2 and TxC1) are detailed below: Mode TxC3 TxC2 Power Save Modes The ...
Page 19
Power Save Modes (Continued) IDLE MODE The device is placed in the IDLE mode by writing a “1” to the IDLE flag (G6 data bit). In this mode, all activities, except the associated on-board oscillator circuitry, the WATCHDOG logic, the ...
Page 20
Multi-Input Wakeup (Continued) selects the trigger condition positive edge. Changing an edge select entails several steps in order to avoid a pseudo Wakeup condition as a result of the edge change. First, the associated WKEN bit should ...
Page 21
A/D Converter (Continued) CHANNEL SELECT This 3-bit field selects one of eight channels to be the V The mode selection determines the V IN− Single Ended mode: Bit 7 Bit 6 Bit ...
Page 22
A/D Converter (Continued) The A/D converter takes 17 A/D clock cycles to complete a conversion. Thus the minimum A/D conversion time for the device is 10.2 µs when a prescaler of 6 has been selected. The 17 A/D clock cycles ...
Page 23
Interrupts (Continued) MASKABLE INTERRUPTS All interrupts other than the Software Trap are maskable. Each maskable interrupt has an associated enable bit and pending flag bit. The pending bit is set to 1 when the interrupt condition occurs. The state of ...
Page 24
Interrupts (Continued) An interrupt service routine typically ends with an RETI instruction. This instruction sets the GIE bit back to 1, pops the address stored on the stack, and restores that address to the program counter. Program execution then proceeds ...
Page 25
Interrupts (Continued) Arbitration Ranking (1) Highest Software (2) Reserved (3) External (4) Timer T0 (5) Timer T1 (6) Timer T1 (7) MICROWIRE/PLUS (8) Reserved (9) Reserved (10) Reserved (11) Timer T2 (12) Timer T2 (13) Timer T3 (14) Timer T3 ...
Page 26
Interrupts (Continued) www.national.com FIGURE 15. VIS Operation FIGURE 16. VIS Flowchart 26 DS100076-30 DS100076-31 ...
Page 27
Interrupts (Continued) Programming Example: External Interrupt PSW =00EF CNTRL =00EE RBIT 0,PORTGC RBIT 0,PORTGD SBIT IEDG, CNTRL SBIT EXEN, PSW SBIT GIE, PSW WAIT: JP WAIT . . . .=0FF VIS . . . .=01FA .ADDRW SERVICE . . INT_EXIT: ...
Page 28
Interrupts (Continued) NON-MASKABLE INTERRUPT Pending Flag There is a pending flag bit associated with the non-maskable interrupt, called STPND. This pending flag is not memory- mapped and cannot be accessed directly by the software. The pending flag is reset to ...
Page 29
WATCHDOG The device contains a WATCHDOG and clock monitor. The WATCHDOG is designed to detect the user program getting stuck in infinite loops resulting in loss of program control or “runaway” programs. The Clock Monitor is used to detect the ...
Page 30
WATCHDOG Operation • The initial WATCHDOG service must match the key data value in the WATCHDOG Service register WDSVR in order to avoid a WATCHDOG error. • Subsequent WATCHDOG services must match all three data fields in WDSVR in order ...
Page 31
MICROWIRE/PLUS (Continued) Key Window Data Data Match Match Don’t Care Mismatch Mismatch Don’t Care Don’t Care Don’t Care TABLE 8. MICROWIRE/PLUS Master Mode Clock Selection SL1 SL0 ...
Page 32
MICROWIRE/PLUS (Continued) www.national.com FIGURE 18. MICROWIRE/PLUS Application 32 DS100076-46 ...
Page 33
Memory Map All RAM, ports and registers (except A and PC) are mapped into data memory address space. Address Contents S/ADD REG 0000 to 006F On-Chip RAM bytes (112 bytes) 0070 to 007F Unused RAM Address Space (Reads As All ...
Page 34
Addressing Modes There are ten addressing modes, six for operand addressing and four for transfer of control. OPERAND ADDRESSING MODES Register Indirect This is the “normal” addressing mode. The operand is the data memory addressed by the B pointer or ...
Page 35
Instruction Set (Continued) INSTRUCTION SET ADD A,Meml ADD ADC A,Meml ADD with Carry SUBC A,Meml Subtract with Carry AND A,Meml Logical AND ANDSZ A,Imm Logical AND Immed., Skip if Zero OR A,Meml Logical OR XOR A,Meml Logical EXclusive OR IFEQ ...
Page 36
Instruction Set (Continued) INSTRUCTION SET (Continued) JSRL Addr. Jump SubRoutine Long JSR Addr Jump SubRoutine JID Jump InDirect RET RETurn from subroutine RETSK RETurn and SKip RETI RETurn from Interrupt INTR Generate an Interrupt NOP No OPeration www.national.com [SP] PL, ...
Page 37
Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes). Most single byte instructions take one cycle time to execute. See the BYTES and CYCLES per INSTRUCTION table for details. Bytes and Cycles per ...
Page 38
Nibble Lower 38 ...
Page 39
Mask Options The mask programmable options are shown below. The options are programmed at the same time as the ROM pattern submission. OPTION 1: CLOCK CONFIGURATION = 1 Crystal Oscillator (CKI/10) G7 (CKO) is clock generator output to crystal/resonator CKI ...
Page 40
... COP8-MLSIM: Free Instruction Level Simulator tool for Windows. For testing and debugging software instruc- tions only (No I/O or interrupt support). TOOLS ORDERING NUMBERS FOR THE COP888GD FAMILY DEVICES Vendor Tools National COP8-NSEVAL COP8-NSEVAL ...
Page 41
Development Tools Support OTP Programmers Contact vendors < Cost: Free $100 $100 - $300 $300 - $1k $1k - $3k $3k - $5k WHERE TO GET TOOLS Tools are ordered ...
Page 42
... Physical Dimensions Order Number COP888GD-XXX/V or COP988GD-XXX/V LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or ...