lmc2626 National Semiconductor Corporation, lmc2626 Datasheet
lmc2626
Available stocks
Related parts for lmc2626
lmc2626 Summary of contents
Page 1
... LMC2626 CMOS LDOR Buffer Chip for Row Inversion Flat Panel Display Systems General Description The LMC2626 integrated circuit is specifically developed for a row inversion TFT FPD system architecture It is designed only to be used in conjunction with National’s LM2625 switching regulator chip Built on National’s advanced CMOS CS80 process this chip ...
Page 2
Absolute Maximum Ratings ESD Tolerance 2 kV HBM 200V MM (Note 4) Sync Input Voltage Supply Voltage (V P5V) IN Continuous Total Power Dissipation (Note 1) Lead Temperature (less than 10 sec) b Storage Temperature Range Junction ...
Page 3
DC Electrical Characteristics Unless otherwise specified all limits guaranteed for SYNC(OPEN) SD(OPEN) P5V V IN Buffer Symbol Parameter V Peak to Peak Output OUT Voltage Swing or V OUT V Low Level Output OL Voltage V High ...
Page 4
... Other conditions are shown in the test A IN Typ Conditions Min (Note 9) To 98% p-p V OUT (see Note and C pin of the LMC2626 is pulled up to the V REF k REF 242V For applications requiring minimum load current less than 20 mA regulated 4 Max Units mF ...
Page 5
5 ...
Page 6
... Italiano National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Order Number LMC2626IM NS Package M08A 2 A critical component is any component of a life ...