xr16v598 Exar Corporation, xr16v598 Datasheet - Page 58

• Manufacturer Part Number: xr16v598
• Description: 2.25v To 3.6v High Performance Octal Uart With 16-byte Fifo
• Manufacturer: Exar Corporation

XR16V598
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
4.0 INTERNAL REGISTER DESCRIPTIONS............................................................................................... 32
ABSOLUTE MAXIMUM RATINGS.................................................................................. 48
ELECTRICAL CHARACTERISTICS ............................................................................... 48
PACKAGE DIMENSIONS................................................................................................ 55
DC E
AC E
R
TIMER OPERATION ................................................................................................................................................ 27
3.2 UART CHANNEL CONFIGURATION REGISTERS .......................................................................................... 30
4.1 RECEIVE HOLDING REGISTER (RHR) - READ ONLY ................................................................................... 32
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY................................................................................ 32
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE................................................................................. 32
4.4 INTERRUPT STATUS REGISTER (ISR) - READ ONLY................................................................................... 34
4.5 FIFO CONTROL REGISTER (FCR) - WRITE ONLY......................................................................................... 35
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE......................................................................................... 36
4.7 MODEM CONTROL REGISTER (MCR) - READ/WRITE .................................................................................. 38
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 39
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 40
4.10 MODEM STATUS REGISTER (MSR) - WRITE ONLY .................................................................................... 41
4.11 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 43
4.12 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE............................................................................ 43
4.13 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE ........................................................................... 44
4.14 XOFF1, XOFF2, XON1 AND XON2 REGISTERS - WRITE ONLY.................................................................. 45
4.15 XCHAR REGISTER - READ ONLY ................................................................................................................. 46
EVISION
T
F
F
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
ABLE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
3.1.3 8XMODE [7:0] (DEFAULT 0X00).................................................................................................................................. 28
3.1.4 4XMODE [7:0] (DEFAULT 0X00).................................................................................................................................. 28
3.1.5 RESET [7:0] (DEFAULT 0X00) ..................................................................................................................................... 29
3.1.6 SLEEP [7:0] (DEFAULT 0X00) ..................................................................................................................................... 29
3.1.7 DEVICE IDENTIFICATION AND REVISION ................................................................................................................. 29
3.1.8 REGB [7:0] (DEFAULT 0X00) ...................................................................................................................................... 29
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 32
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 32
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 34
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 34
10: TIMER C
11: UART C
12: UART C
13: I
14: T
15: P
16: A
17: S
18: UART R
14. T
15. I
16. 16 M
17. 68 M
18. M
19. R
20. T
21. R
22. T
H
00-00).............................................................................................................................................................................. 26
3.1.2.1 TIMERMSB [7:0]
3.1.2.2 TIMER [7:0] R
3.1.2.3 TIMERCNTL [7:0] R
3.1.7.1 DVID [7:0] (
3.1.7.2 DREV [7:0] (
ISTORY
NTERRUPT
RANSMIT AND
ARITY
UTO
OFTWARE
NTERRUPT
IMER
RANSMIT
RANSMIT
ECEIVE
ECEIVE
ODEM
C
C
RS485 H
ODE
ODE
/C
HARACTERISTICS
P
HARACTERISTICS
...................................................................................................................................... 56
HANNEL
HANNEL
ESET
ROGRAMMING
I
ONTROL
OUNTER CIRCUIT
NPUT
I
I
(I
(M
NTERRUPT
NTERRUPT
S
F
I
I
NTERRUPT
NTERRUPT
NTEL
O
OURCE AND
LOW
OTOROLA
C
UTPUT IN
R
/O
ALF
ONDITIONS
ECEIVE
C
C
) D
UTPUT
C
C
DEFAULT
ONFIGURATION
ONFIGURATION
DEFAULT
-
ONTROL
OMMANDS
DUPLEX
ATA
ESERVED
T
T
) D
T
T
.................................................................................................................................................. 37
IMING
IMING
O
AND
FIFO T
T
B
IMING
IMING
P
NE
............................................................................................................................................. 27
IMING
ATA
US
RIORITY
EGISTER
............................................................................................................................................ 47
0
D
F
-S
(0
............................................................................................................. 48
............................................................................................................. 49
X
TIMERLSB [7:0] ............................................................................................................. 26
[N
[FIFO M
UNCTIONS
R
IRECTION
....................................................................................................................................... 26
44) ................................................................................................................................. 29
....................................................................................................................................... 27
X
B
HOT AND
[N
[FIFO M
EAD AND
01) .............................................................................................................................. 29
RIGGER
ON
US
.................................................................................................................................... 53
ON
R
R
-FIFO M
L
R
EGISTERS
EGISTERS
.............................................................................................................................. 26
-FIFO M
EVEL
EAD AND
ODE
C
ODE
R
T
........................................................................................................................ 45
W
ONTROL
ABLE AND
E
]................................................................................................................... 54
..................................................................................................................... 35
RITE
-
ODE
]................................................................................................................. 54
TRIGGERABLE
ODE
D
W
............................................................................................................... 30
ESCRIPTION
]........................................................................................................... 53
T
RITE
]......................................................................................................... 54
IMING
D
L
ELAY FROM
II
EVEL
T
................................................................................................. 51
IMING
M
S
. S
ODES
ELECTION
........................................................................................ 52
HADED BITS ARE ENABLED BY
T
RANSMIT
................................................................................. 28
.......................................................................... 36
-
TO
-R
ECEIVE
................................................. 42
EFR B
IT
-4. ........................ 31
REV. 1.0.2