71m6534h-igt Maxim Integrated Products, Inc., 71m6534h-igt Datasheet - Page 47

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71m6534h-igt

Manufacturer Part Number
71m6534h-igt
Description
Energy Meter Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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FDS_6533_6534_004
Three-wire (µ-Wire) EEPROM Interface
A 500 kHz three-wire interface, using SDATA, SCK, and a DIO pin for CS is available. The interface is
selected by setting DIO_EEX = 3. The EECTRL bits when the three-wire interface is selected are shown in
Table
from the EEPROM, depending on the values of the EECTRL bits.
v1.1
Control
Status
3:0
Bit
Bit
7
6
5
4
7
6
5
4
DIO5 directly is discouraged, because it may tie up the MPU to the point where it may become too
busy to process interrupts.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. In
this case, a resistor has to be used in series with SDA to avoid data collisions due to limits in the
speed at which the SDA pin can be switched from output to input. However, controlling DIO4 and
42. When EECTRL is written, up to 8 bits from EEDATA are either written to the EEPROM or read
The µ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
CMD[3:0]
ERROR
BUSY
RX_ACK
TX_ACK
Name
Name
BUSY
WFR
HiZ
RD
Read/
Read/
Write
Write
W
W
W
W
R
R
R
R
R
© 2007-2009 TERIDIAN Semiconductor Corporation
Table 41: EECTRL Bits for 2-pin Interface
Description
Wait for Ready. If this bit is set, the trailing edge of BUSY will be delayed
until a rising edge is seen on the data line. This bit can be used during
the last byte of a Write command to cause the INT5 interrupt to occur
when the EEPROM has finished its internal write sequence. This bit is
ignored if HiZ=0.
Asserted while the serial data bus is busy. When the BUSY bit falls, an
INT5 interrupt occurs.
Indicates that the SD signal is to be floated to high impedance immedi-
ately after the last SCK rising edge.
Indicates that EEDATA is to be filled with data from EEPROM.
Reset
State
0000
Table 42: EECTRL Bits for the 3-wire Interface
0
0
1
1
Positive
Positive
Negative
Negative
Positive
Polarity
Description
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the
EEPROM.
0000
0010
0011
0101
0110
1001
Others
CMD[3:0]
No-op command. Stops the I
(SCK, DIO4). If not issued, SCK
keeps toggling.
Receive a byte from the EEPROM
and send ACK.
Transmit a byte to the EEPROM.
Issue a STOP sequence.
Receive the last byte from the
EEPROM and do not send ACK.
Issue a START sequence.
No operation, set the ERROR bit.
71M6533/71M6534 Data Sheet
Operation
2
C clock
47

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