as7c33128pfd32a Alliance Memory, Inc, as7c33128pfd32a Datasheet
as7c33128pfd32a
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as7c33128pfd32a Summary of contents
Page 1
... Output Input registers registers DQP CLK CLK d DATA [35:0] FT DATA [31:0] –166 –150 6 6.7 166 150 3.5 3.8 475 450 130 110 30 30 Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A DDQ pipeline architecture available / DDQ SSQ ...
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... WE signals are sampled on the clock edge that samples ADSC LOW (and ADSP High). • Master chip enable CE0 blocks ADSP, but not ADSC. AS7C33128PFD32A and AS7C33128PFD36A family operates from a core 3.3V power supply. I/Os use a separate power supply that can operate at 2.5V or 3.3V. These devices are available in a 100-pin 14 × TQFP package. ...
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... Symbol Min –0.5 DD DDQ V –0 –0 – – OUT T –65 stg T –65 bias Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A 18 DD Max Unit +4 0 0.5 V DDQ 1 +150 C o +135 ...
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... SSQ V 2.35 DDQ V 0.0 SSQ V 2 –0 2 –0 Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A CLK Operation Deselect Deselect Deselect Deselect Deselect Begin read Begin read ...
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... Min Max Min Max Min Max Min Max Max – GND to V OUT mA 2.65V – 0.7 DDQ = –2 mA 2.35V 1.7 – DDQ Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A Symbol Typical Units 40 C C/W JC –150 –133 –100 – 2 – 2 – 2 – 2 – ...
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... ADVS t 1.5 – 1.5 – ADSPS t 1.5 – 1.5 – ADSCS t 0.5 – 0.5 – ADVH t 0.5 – 0.5 – ADSPH t 0.5 – 0.5 – ADSCH Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A –133 –100 Min Max Min Max Unit Notes* – 133 – 100 MHz 7.5 – 10 – – 12 – ns – 4.0 – 5.0 ns – 10 – ...
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... CYC ADSCH LOAD NEW ADDRESS HZOE t OH ADV INSERTS WAIT STATES Q(A2) Q(A2Ý01) Q(A2Ý10) Q(A2Ý01) Q(A2Ý10) Q(A2Ý11) Falling input Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A Q(A3Ý10) Q(A3Ý11) Q(A2Ý11) Q(A3) Q(A3Ý01) Q(A3) Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) t HZC Undefined/don’t care HZC ...
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... CE1 ADV OE Data In D(A1) Note: Ý = XOR when MODE = HIGH/No Connect; Ý = ADD when MODE = LOW. 3/22/01; v.1.0 ® t CYC ADV SUSPENDS BURST D(A2) D(A2Ý01) D(A2Ý01) D(A2Ý10) Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A t ADSCS t ADSCH ADSC LOADS NEW ADDRESS ADVS t ADVH D(A2Ý ...
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... Note: Ý = XOR when MODE = HIGH/No Connect; Ý = ADD when MODE = LOW. 3/22/01; v.1.0 ® t CYC ADVS t ADVH D(A2 HZOE LZC t CD Q(A1) Q(A1) Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A LZOE t OE Q(A3) Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) Q(A3Ý01) Q(A3Ý10) Q(A3Ý11 ...
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... V = 1.5V L for 3.3V I/ DDQ for 2.5V I/O Figure B: Output load (A) at any given temperature and voltage. LZC Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A Thevenin equivalent: +3.3V for 3.3V I/O; +2.5V for 2.5V I/O 317 D OUT 5 pF* 351 GND *including scope and jig capacitance Figure C: Output load( ...
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... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. ® –150 MHz –133 MHz AS7C33128PFD32A-133TQC AS7C33128PFD32A-133TQI AS7C33128PFD36A-133TQC AS7C33128PFD36A-133TQI PF D 32/ Alliance Semiconductor AS7C33128PFD32A AS7C33128PFD36A –100 MHz AS7C33128PFD32A-100TQC AS7C33128PFD32A-100TQI AS7C33128PFD36A-100TQC AS7C33128PFD36A-100TQI –XXX TQ C ...