74LV14D,118 NXP Semiconductors, 74LV14D,118 Datasheet - Page 10

IC HEX INV SCHMITT TRIG 14SOIC

74LV14D,118

Manufacturer Part Number
74LV14D,118
Description
IC HEX INV SCHMITT TRIG 14SOIC
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet

Specifications of 74LV14D,118

Number Of Circuits
6
Logic Type
Inverter with Schmitt Trigger
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Number Of Inputs
1
Current - Output High, Low
12mA, 12mA
Voltage - Supply
1 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LV
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Logical Function
Inverter Schmit Trig
Number Of Elements
6
Input Type
Schmitt Trigger
Propagation Delay Time
48ns
Operating Supply Voltage (typ)
3.3V
Package Type
SO
Operating Temp Range
-40C to 125C
Pin Count
14
Quiescent Current
40uA
Output Type
Schmitt Trigger
Technology
CMOS
Mounting
Surface Mount
Operating Temperature Classification
Automotive
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LV14D-T
74LV14D-T
935069490118
NXP Semiconductors
15. Application information
74LV14
Product data sheet
Fig 13. Average additional supply current as a function of V
Fig 14. Relaxation oscillator
(1) Positive-going edge.
(2) Negative-going edge.
f
=
-- -
T
1
---------------------
0.8 RC
1
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
P
Average I
An example of a relaxation circuit using the 74LV14 is shown in
add
P
f
t
t
I
i
r
f
add
= input frequency (MHz);
= fall time (ns); 90 % to 10 %;
= rise time (ns); 10 % to 90 %;
CC(AV)
= f
= additional power dissipation (W);
i
 (t
ΔI
CC(AV)
(μA)
= average additional supply current (A).
CC(AV)
100
r
75
50
25
 I
0
1.0
All information provided in this document is subject to legal disclaimers.
CC(AV)
differs with positive or negative input transitions, as shown in
Rev. 5 — 5 January 2011
+ t
1.5
f
 I
C
CC(AV)
R
2.0
)  V
mna035
CC
CC
2.5
V
where:
001aah097
CC
(V)
(1)
(2)
3.0
Hex inverting Schmitt trigger
Figure
14.
© NXP B.V. 2011. All rights reserved.
74LV14
Figure
10 of 19
13.

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