le79489 Zarlink Semiconductor, le79489 Datasheet - Page 10

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le79489

Manufacturer Part Number
le79489
Description
Subscriber Line Interface Circuit
Manufacturer
Zarlink Semiconductor
Datasheet

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I
C
GFA
RCL
R
C
I
C
LIMIT
S
Z
Z
DC
D
CAS
BSWEN
tan
T
RX
=
dby
=
=
=
=
=
365
-------- - ,
=
I
253
=
1.5 ms
T
1.4
0.99
=
----------- -
G
----------------------------- -
3.4 10
=
---------------------------------
R
Z
42L
---------------------------------- -
(
625 GFA
L
DC1
V
5 µmhos T
Z
400 Ω
BAT1
2WIN
(
1
(
R
(
-------------------------------------------
+
-------------------------------------------------- -
Z
R
------------------------------- -
State
R
RFA
(
5
DC1
T
RFA
πf
R
DC1
0
1
2
3
4
5
6
7
DC1
+
+
DC2
c
R
)
2R
253
+
3 V
500
L
+
+
R
+
F
R
R
D
30.1 kΩ
)
(
DC2
C
32 kΩ
(
(
Z
DC2
DC2
Z
ms
D
L
T
)
+
)
=
)
C3 C2 C1
2R
0
0
0
0
1
1
1
1
0.5 ms
--------------- -
----------------------------------------- -
(
)
(
RFA
)
R
F
RFA
)
D
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Table 2. User-Programmable Components
+
+
100 kΩ
60 kΩ
Standby, Reverse Polarity
Reserved
Active, Reverse Polarity
Tip Open
Disconnect
Ringing
Active, Normal
Standby, Normal
)
Table 1. SLIC Decoding
)
Zarlink Semiconductor Inc.
2-Wire Status
10
Z
are R
When computing Z
external stray capacitance between VTX and RSN must be taken
into account. The internal amplifier pole is:
Z
is the desired receive gain. Z
R
R
current in the constant-current region.
R
and I
Active state.
C
cutoff frequency.
Standby loop current (resistive region).
C
switching. T
delay from BAT2 to BAT1 is about 0.1 T
T
RX
DC1
DC1
D
CAS
BSWEN
is connected between the VTX and RSN pins. The fuse resistors
and C
is connected from VRX to RSN. Z
T
F
, R
and R
is the regulator filter capacitor and f
, and Z
is the threshold current between on hook and off hook in the
DC2
is connected from BSWEN to GND for automatic
D
form the network connected from R
DC2
, and C
D
2WIN
Loop detector
X
Loop detector
GK or loop detector
Ring trip
Ring trip
Loop detector
Loop detector
is the delay in switching from BAT1 to BAT2. The
are approximately equal. I
is the desired two-wire AC input impedance.
DC
T
, the internal current amplifier pole and any
E1 = 1
form the network connected to the R
22 kHz R
-------------------------------------
DET Output
600 Ω
L
is the 2-wire load impedance.
±
10%
LAC
T
is defined above, and G
GK
X
GK
GK
Ring trip
Ring trip
GK
GK
D
E1 = 0
LIMIT
c
.
is the desired filter
D
is the desired loop
to AGND/DGND
DC
pin.
42L

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