zl30112 Zarlink Semiconductor, zl30112 Datasheet - Page 9

• Manufacturer Part Number: zl30112
• Description: Slic/codec Dpll
• Manufacturer: Zarlink Semiconductor

5.3
Jitter transfer or jitter attenuation refers to the magnitude of jitter at the output of a device for a given amount of jitter
at the input of the device. Input jitter is applied at various amplitudes and frequencies, and output jitter is measured
with various filters depending on the applicable standards. For the ZL30112, the internal low pass loop filter
determines the jitter attenuation.
Since intrinsic jitter is always present, jitter attenuation will appear to be lower for small input jitter signals than for
large ones. Consequently, accurate jitter transfer function measurements are usually made with large input jitter
signals (for example 75% of the specified maximum tolerable input jitter).
5.4
Frequency accuracy is defined as the absolute accuracy of an output clock signal when it is not locked to an
external reference, but is operating in a free running mode. For the ZL30112, the Freerun accuracy is equal to the
master clock (OSCi) accuracy.
5.5
Also referred to as pull-in range. This is the input frequency range over which the PLL must be able to pull into
synchronization. The ZL30112 capture range is equal to
For example, a +32 ppm master clock results in a capture range of +162 ppm on one side and -98 ppm on the other
side of frequency range.
5.6
This is the input frequency range over which the synchronizer must be able to maintain synchronization. The lock
range is equal to the capture range for the ZL30112.
5.7
TIE is the time delay between a given timing signal and an ideal timing signal.
5.8
MTIE is the maximum peak to peak delay between a given timing signal and an ideal timing signal within a
particular observation period.
5.9
Phase continuity is the phase difference between a given timing signal and an ideal timing signal at the end of a
particular observation period. Usually, the given timing signal and the ideal timing signal are of the same frequency.
Phase continuity applies to the output of the PLL after a signal disturbance due to a reference switch or a mode
change. The observation period is usually the time from the disturbance, to just after the synchronizer has settled to
a steady state.
Jitter Transfer
Freerun Accuracy
Capture Range
Lock Range
Time Interval Error (TIE)
Maximum Time Interval Error (MTIE)
Phase Continuity
Zarlink Semiconductor Inc.
ZL30112
±
9
130 ppm minus the accuracy of the master clock (OSCi).
Data Sheet