tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 57

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tfra08c13

Manufacturer Part Number
tfra08c13
Description
Tfra08c13 Octal T1/e1 Framer
Manufacturer
ETC-unknow
Datasheet
Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
CEPT Time Slot 0 FAS/NOT FAS Control
Bits
Otherwise, the E bits are transmitted to the line in the 1
state.
NOT FAS A-Bit (CEPT Remote Frame Alarm)
Sources
The A bit, as described in ITU Rec. G.704 Section
2.3.2, Table 4a/G.704, is the remote alarm indication
bit. In undisturbed conditions, this bit is set to 0 and
transmitted to the line. In the loss of frame alignment
(LFA) state, this bit may be set to 1 and transmitted to
the line as determined by register FRM_PR27. The A
bit is set to 1 and transmitted to the line for the following
conditions:
CEPT with CRC-4
— If FRM_PR28 bit 0 = 0, then the TSiF bit
— If FRM_PR28 bit 0 = 1, then each time 0 is written
CEPT with CRC-4
E bit = 0:
— Optionally, one transmitted E bit is set to 0 by the
— Optionally, as described in ITU Rec. G.704 Sec-
— Optionally, when the 100 ms or 400 ms timer is
Setting the transmit A bit = 1 control bit by setting
register FRM_PR27 bit 7 to 1.
(FRM_PR28 bit 1) is transmitted in bit 1 of frame
13 (E bit) and the TSiNF bit (FRM_PR28 bit 2) is
transmitted in bit 1 of frame 15 (E bit).
into TSiF (FRM_PR28 bit 1) one E bit = 0 is trans-
mitted in frame 13, and each time 0 is written into
TSiNF (FRM_PR28 bit 2) one E bit = 0 is transmit-
ted in frame 15.
transmit framer, as described in ITU Rec. G.704
Section 2.3.3.4, for each received errored CRC-4
submultiframe detected by the receive framer if
FRM_PR28 bit 3 = 1.
tion 2.3.3.4, both E bits are set to 0 while in a
received loss of CRC-4 multiframe alignment
state
enabled and the timer has expired, as described
in ITU Rec. G.706 Section B.2.2, both E bits are
set to 0 for the duration of the loss of CRC-4 multi-
frame alignment state
(continued)
2
if FRM_PR28 bit 4 = 1.
1
1
: manual transmission of E bit = 0:
, automatic transmission of
2
if FRM_PR28 bit 5 = 1.
NOT FAS Sa-Bit Sources
The Sa bits, Sa4—Sa8, in the NOT FAS frame can be a
4 kbits/s data link to and from the remote end. The
sources and value for the Sa bits are as follows:
1. The receive E-bit processor will halt the monitoring of received E
2. Whenever loss of frame alignment occurs, then loss of CRC-4
3. LFA is due to framing bit errors.
4. LFA is due to detecting 915 out of 1000 received CRC-4 errored
5. See Table 29 . Sa6 Bit Coding Recognized by the Receive Framer,
6. Whenever bits (e.g., Si, Sa, etc.) are transmitted from the system
Optionally for the following alarm conditions as
selected through programming register FRM_PR27.
— The duration of loss of basic frame alignment as
— The duration of loss of CRC-4 multiframe align-
— The duration of loss of signaling time slot 16 multi-
— The duration of loss of CRC-4 multiframe align-
— The duration of receive Sa6_8hex
— The duration of receive Sa6_Chex
The Sa source register FRM_PR29 bit 0—bit 4 if
FRM_PR29 bit 7—bit 5 = 000 (binary) and
FRM_PR30 bit 4—bit 0 = 11111 (binary).
The facility data link external input (TFDL) if register
FRM_PR29 bit 7 = 1 and register FRM_PR21
bit 6 = 1.
The internal FDL-HDLC if register FRM_PR29
bit 7 = 1 and register FRM_PR21 bit 6 = 0.
The Sa transmit stack if register FRM_PR29
bit 7—bit 5 are set to 01x (binary).
bits during loss of CRC-4 multiframe alignment.
multiframe alignment is forced. Once frame alignment is estab-
lished, then and only then, is the search for CRC-4 multiframe
alignment initiated. The receive framer unit, when programmed for
CRC-4, can be in a state of LFA and LTS0MFA or in a state of
LTS0MFA only, but cannot be in a state of LFA only.
blocks.
for a definition of this Sa6 pattern.
transparently, FRM_PR29 must first be momentarily written to
001xxxxx (binary). Otherwise, the transmit framer will not be able
to locate the biframe alignment.
described in ITU Rec. G.706 Section 4.1.1
ITU Rec. G.706 Section 4.3.2
FRM_PR27 bit 0 = 1.
ment if register FRM_PR27 bit 2 = 1.
frame alignment if register FRM_PR27 bit 1 = 1.
ment after either the 100 ms or 400 ms timer
expires if register FRM_PR27 bit 3 = 1.
FRM_PR27 bit 4 = 1.
FRM_PR27 bit 5 = 1.
TFRA08C13 OCTAL T1/E1 Framer
6
4
if register
5
5
if register
if register
3
, or
57

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