txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 2

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txc-03456

Manufacturer Part Number
txc-03456
Description
Device Level Mapper
Manufacturer
TranSwitch Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
txc-03456-AIPQ
Manufacturer:
NXP
Quantity:
6
* Please note that TranSwitch provides documentation for all of its products. Customers who are using a
TranSwitch Product, or planning to do so, should register with the TranSwitch Marketing Department to
receive relevant updated and supplemental documentation as it is issued. They should also contact the
Applications Engineering Department to ensure that they are provided with the latest available information
about the product, especially before undertaking development of new designs incorporating the product.
Section
Block Diagram ...................................................................................................................................... 3
Block Diagram Description ................................................................................................................... 4
Pin Diagram .......................................................................................................................................... 7
Pin Descriptions .................................................................................................................................... 8
Absolute Maximum Ratings ................................................................................................................ 19
Thermal Characteristics ...................................................................................................................... 19
Power Requirements .......................................................................................................................... 19
Input, Output and I/O Parameters ....................................................................................................... 20
Timing Characteristics ........................................................................................................................ 22
Operation ....................................................................................................................................... 40-61
Memory Map ....................................................................................................................................... 62
Memory Map Descriptions .................................................................................................................. 66
Package Information ........................................................................................................................... 89
Ordering Information ........................................................................................................................... 90
Related Products ................................................................................................................................ 90
Standards Documentation Sources .................................................................................................... 91
List of Data Sheet Changes ............................................................................................................... 93
Documentation Update Registration Form* ................................................................................... 95
Figure
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Internal Device Operation .............................................................................................................. 40
External Device Operation ............................................................................................................. 57
Add Bus Interface Timing (Drop Bus Clock and C1) ...................................................... 26
Transmit Overhead Comm Channel Timing ................................................................... 28
Receive Overhead Comm Channel Timing .................................................................... 28
Receive Path Overhead Interface Timing ....................................................................... 30
Microprocessor Timing Read Cycle - Intel ...................................................................... 33
Microprocessor Timing Read Cycle - Motorola .............................................................. 35
Microprocessor Timing Read Cycle Multiplex Bus - Motorola ........................................ 37
Boundary Scan Timing .................................................................................................... 39
Test Generator, Analyzer and Loopback......................................................................... 49
Boundary Scan Schematic .............................................................................................. 52
Phase-Locked Loop......................................................................................................... 57
L4M 140 Mbit/s Line Interface ........................................................................................ 58
L4M TXC-03456 144-Pin Plastic Quad Flat Package .................................................... 89
L4M TXC-03456 Block Diagram ....................................................................................... 3
L4M TXC-03456 Pin Diagram .......................................................................................... 7
Transmit Line Interface Timing ....................................................................................... 22
Receive Line Interface Timing ........................................................................................ 23
Add Bus Interface Timing (Add Bus) .............................................................................. 24
Add Bus Interface Timing (External Clock) ..................................................................... 25
Drop Bus Interface Timing .............................................................................................. 27
Transmit Path Overhead Interface Timing ...................................................................... 29
Transmit Alarm Indication Port Timing ........................................................................... 31
Receive Alarm Indication Port Timing ............................................................................ 32
Microprocessor Timing Write Cycle - Intel ...................................................................... 34
Microprocessor Timing Write Cycle - Motorola ............................................................... 36
Microprocessor Timing Write Cycle Multiplex Bus - Motorola ........................................ 38
Pointer Interpretation State Diagram .............................................................................. 41
Use of Two L4M Devices in Ring Configuration .............................................................. 60
TABLE OF CONTENTS
LIST OF FIGURES
DATA SHEET
- 2 -
Page
Page
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
L4M

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