emc2106 Standard Microsystems Corp., emc2106 Datasheet - Page 67

• Manufacturer Part Number: emc2106
• Description: Emc2106 Dual Rpm-based Linear Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
ADDR
2Ch
2Dh
2Fh
Dual RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2106
6.19
6.20
R/W
R/W
R/W
R/W
R/W
1
0
0
1
1
Bits 7-6 - PWM_BASE4[1:0] - Determines the base frequency of the PWM4 driver (GPIO3 / PWM4
pin).
Bits 5-4 - PWM_BASE3[1:0] - Determines the base frequency of the PWM3 driver (GPIO2 / PWM3
pin).
Bits 3-2 - PWM_BASE2[1:0] - Determines the base frequency of the PWM2 driver (PWM2 / GPIO4
pin).
Bits 1-0 - PWM_BASE1[1:0] - Determines the base frequency of the PWM1 driver (PWM1).
The PWM 3 and PWM 4 Divide Registers determine the final frequency of the PWM 3 and PWM 4
drivers respectively. Each driver base frequency is divided by the value of the PWM Divide Register
to determine the final frequency. The duty cycle settings are not affected by these settings, only the
final frequency of the PWM driver. A value of 00h will be decoded as 01h.
The PWM 3 Input Register controls the output of the GPIO2 / PWM3 pin when it is configured as a
PWM output. The input code represents the number of counts out of a total of 255 that the output will
be high for.
PWM 3 and 4 Divide Registers
PWM 3 Setting Register
REGISTER
REGISTER
PWM 3
PWM 4
PWM 3
Setting
Divide
Divide
PWM_BASEX[1:0]
128
128
128
B7
B7
Table 6.24 PWM_BASEx[1:0] Bit Decode
Table 6.26 PWM 3 Setting Register
Table 6.25 PWM Divide Registers
B6
64
64
B6
0
0
1
0
1
64
DATASHEET
B5
32
32
B5
32
67
B4
16
16
B4
16
B3
B3
8
8
8
BASE FREQUENCY
2,441Hz (default)
19.531kHz
B2
26.00kHz
B2
4,882Hz
4
4
4
B1
B1
2
2
2
Revision 1.74 (05-08-08)
B0
B0
1
1
1
DEFAULT
DEFAULT
50h
(80)
50h
(80)
00h