emc2106 Standard Microsystems Corp., emc2106 Datasheet - Page 87

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emc2106

Manufacturer Part Number
emc2106
Description
Emc2106 Dual Rpm-based Linear Fan Controller With Hardware Thermal Shutdown
Manufacturer
Standard Microsystems Corp.
Datasheet

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Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
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Quantity:
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ADDR
ADDR
E5h
E6h
ADDR
E4h
Dual RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2106
6.42
6.43
6.44
R/W
R/W
R/W
R-C
R/W
R/W
REGISTER
REGISTER
Interrupt
REGISTER
Enable
Status
open-drain output). When a GPIO is configured as an input, any change of state will assert the
ALERT# pin (unless GPIO interrupts are masked, see
The GPIO Output Register controls the state of the corresponding GPIO pins when they areconfigured
as GPIOs and as outputs.
If the output is configured as an open-drain output, then it requires a pull-up resistor to VDD. Setting
the corresponding bit to a ‘1’ will act to disable the output allowing the pull-up resistor to pull the output
high. Setting the corresponding bit to a ‘0’ will enable the output and drive the pin to a logical ‘0’ state.
If the output is configured as a push-pull output, then output pin will immediately be driven to match
the corresponding bit setting.
The GPIO Interrupt Enable Register enables the GPIOs to assert the ALERT pin when they change
state. When the GPIO pins are disabled or configured as outputs, then these bits are ignored.
Bit 5 - 0 - GPIOx_INT_EN - Allows the ALERT# pin to be asserted when the GPIOx pin changes state
(when configured as an input).
The GPIO Status Register indicates which GPIO has changed states to cause the ALERT pins to be
asserted. This register is cleared when it is read. The bits in this register are set whenever the
GPIO Output Register
GPIO Interrupt Enable Register
GPIO
GPIO Status Register
GPIO
Output 1
GPIO
‘0’ (default) - The ALERT# pin will not be asserted when the GPIOx pin changes state (when
configured as an input).
‘1’ - The ALERT# pin will be asserted when the GPIOxpin changes state (when configured as an
input).
B7
B7
-
-
B7
-
Table 6.62 GPIO Interrupt Enable Register
B6
B6
Table 6.61 GPIO Output Register
Table 6.63 GPIO Status Register
-
-
B6
-
GPIO6_
GPIO6_
INT_EN
DATASHEET
STS
GPIO6_
B5
B5
OUT
B5
87
GPIO5_
GPIO5_
INT_EN
STS
GPIO5_
B4
B4
OUT
B4
Section
GPIO4_
INT_EN
GPIO4_
STS
GPIO4_
B3
B3
OUT
B3
6.15).
GPIO3_
GPIO3_
INT_EN
STS
GPIO3
_OUT
B2
B2
B2
GPIO2_
GPIO2_
INT_EN
GPIO2
Revision 1.74 (05-08-08)
_OUT
STS
B1
B1
B1
GPIO1
_OUT
GPIO1_
INT_EN
GPIO1_
B0
STS
B0
B0
DEFAULT
DEFAULT
DEFAULT
00h
00h
00h

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