hi-3210 Holt Integrated Circuits, Inc., hi-3210 Datasheet - Page 30

• Manufacturer Part Number: hi-3210
• Description: Arinc 429 Data Management Engine / Octal Receiver / Quad Transmitter
• Manufacturer: Holt Integrated Circuits, Inc.

This register controls RAM built-in self-test. Bits 0,1 are Read Only. The remaining bits in this register are Read-Write but can
be written only in MODE2:0 = 0x04.
BIST Control Register bits provide a means for the host to perform RAM self-test at other times. Register bits 6:4 select RAM
test type. Then bit 3 starts the selected RAM test, and bits 1:0 report a fail/pass result after test completion.
Bit No.
7
6:4
RAM BUILT-IN SELF-TEST
The HI-3210 offers a built-in self-test (BIST) feature which can be used to check RAM integrity. The BIST Control/Status
Register is used to control the BIST function. All tests are destructive, overwriting data present before test commencement.
BIST CONTROL/STATUS REGISTER
(Address 0x8070)
RBSEL2-0 RAM BIST Select Bits 2-0.
Mnemonic Interrupt Type
RBFFAIL
RAM BIST Force Failure.
When this bit is asserted, RAM test failure is forced to verify that RAM BIST logic is functional.
This 3-bit field selects the RAM BIST test mode applied when the RBSTART bit is set:
RBSEL2:0
Description of the RAM BIST “PATTERN” test selected when register bits RBSEL2:0 =
001:
1. Write 0x00 to all RAM locations, 0x0000 through 0x7FFF
2. Repeat the following sequence for each RAM location from 0x0000 through 0x7FFF:
3. Write 0xFF to all RAM locations, 0x0000 through 0x7FFF
4. Repeat the following sequence for each RAM location from 0x0000 through 0x7FFF:
000
001
010
100
101
011
110
111
SELECTED RAM TEST
Idle
Pattern Test, described below
Write 0x00 to RAM address range 0x0000 - 0x7FFF
Read and verify 0x00 over RAM address range 0x0000 - 0x7FFF
Write 0xFF to RAM address range 0x0000 - 0x7FFF
Read and verify 0xFF over RAM address range 0x0000 - 0x7FFF
Inc / Dec Test performs only steps 5 - 8 of the Pattern Test below
Idle
HOLT INTEGRATED CIRCUITS
a. Read and verify 0x00
b. Write then read and verify 0x55
c.
d. Write then read and verify 0x33
e. Write then read and verify 0xCC
f.
g. Write then read and verify 0xF0
h. Write then read and verify 0x00
I.
j.
a. Read and verify 0xFF
b. Write then read and verify 0x55
c. Write then read and verify 0xAA
d. Write then read and verify 0x33
e. Write then read and verify 0xCC
Write then read and verify 0xAA
Write then read and verify 0x0F
Write then read and verify 0xFF
Write 0x00 then increment RAM address and go to step (a)
HI-3210
MSB
7
30
6
5
4
3
X
2
1
LSB
0