k4h560838f-uccc ETC-unknow, k4h560838f-uccc Datasheet - Page 9

• Manufacturer Part Number: k4h560838f-uccc
• Description: Ddr Sdram Ddr Sdram 256mb F-die X8, X16
• Manufacturer: ETC-unknow

DDR SDRAM 256Mb F-die (x8, x16)
8M x 8bit x 4 Banks / 4M x 16Bit x 4 Banks Double Data Rate SDRAM
General Description
Note :
The K4H560838F / K4H561638F is 268,435,456 bits of double data rate synchronous DRAM organized as 4x 8,388,608 / 4x 4,194,304
words by 8 / 16bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous features with Data Strobe allow
extremely high performance up to 400Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequen-
cies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory
system applications.
Absolute Maximum Ratings
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
DC Operating Conditions
Supply voltage(for device with a nominal V
I/O Supply voltage
I/O Reference voltage
I/O Termination voltage(system)
Input logic high voltage
Input logic low voltage
Input Voltage Level, CK and CK inputs
Input Differential Voltage, CK and CK inputs
V-I Matching: Pullup to Pulldown Current Ratio
Input leakage current
Output leakage current
Output High Current(Normal strengh driver) ;V
Output High Current(Normal strengh driver) ;V
Output High Current(Half strengh driver) ;V
Output High Current(Half strengh driver) ;V
Voltage on V
1.VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same.
2. V
3. V
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire
5. This is the DC voltage supplied at the DRAM and is inclusive of all noise up to 20MHz. Any noise above 20MHz at the DRAM
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Peak-to peak noise on VREF may not exceed +/-2% of the dc value.
V
generated from any source other than the DRAM itself may not exceed the DC voltage range of 2.6V +/-100mV.
temperature and voltage range, for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the
maximum difference between pullup and pulldown drivers due to process variation. The full variation in the ratio of the
maximum to minimum pullup and pulldown current will not exceed 1/7 for device drain to source voltages from 0.1 to 1.0.
TT
REF
ID
Voltage on any pin relative to V
is the magnitude of the difference between the input level on CK and the input level on CK.
is not applied directly to the device. V
, and must track variations in the DC level of V
Storage temperature
DD
Short circuit current
Power dissipation
& V
Parameter
DDQ
Parameter
supply relative to V
SS
DD
OUT
OUT
of 2.5V)
OUT
OUT
= V
SS
= V
TT
= V
TT
Recommended operating conditions(Voltage referenced to V
= V
TT
is a system supply for signal termination resistors, is expected to be set equal to
+ 0.45V
TT
- 0.45V
TT
+ 0.84V
- 0.84V
REF
V
V
Symbol
DD
IN
T
, V
I
, V
P
STG
OS
D
Symbol
VI(Ratio)
V
V
V
V
OUT
DDQ
V
V
IH
IN
ID
IL
V
V
I
I
I
I
I
DDQ
REF
(DC)
OZ
OH
OH
(DC)
(DC)
(DC)
OL
OL
DD
I
TT
I
0.49*VDDQ
V
V
REF
REF
-16.8
0.36
0.71
16.8
Min
-0.3
-0.3
2.5
2.5
-2
-5
-9
9
+0.15
-0.04
-55 ~ +150
-0.5 ~ 3.6
-1.0 ~ 3.6
Value
1.5
50
Rev. 1.1 August. 2003
0.51*VDDQ
V
V
V
V
V
REF
REF
DDQ
DDQ
DDQ
Max
2.7
2.7
1.4
DDR SDRAM
2
5
+0.04
-0.15
+0.3
+0.3
+0.6
SS
=0V, T
Unit
mA
mA
mA
mA
uA
uA
V
V
V
V
V
V
V
Unit
-
mA
°C
W
V
V
A
=0 to 70°C)
Note
5
5
1
2
3
4