54abt374 National Semiconductor Corporation, 54abt374 Datasheet - Page 2

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54abt374

Manufacturer Part Number
54abt374
Description
Octal D-type Flip-flop With Tri-state Outputs
Manufacturer
National Semiconductor Corporation
Datasheet

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Pin Descriptions
Function Table
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
D
CP
OE
O
Names
0
0
Pin
–D
–O
7
7
Data Inputs
Clock Pulse Input (Active
Rising Edge)
TRI-STATE Output Enable
Input (Active LOW)
TRI-STATE Outputs
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
N
NC = No Change
Description
OE
H
H
H
H
= LOW-to-HIGH Transition
L
L
L
L
Inputs
CP
N
N
N
N
H
H
H
H
D
H
H
H
H
L
L
L
L
Internal
NC
NC
NC
NC
Q
H
H
L
L
2
Outputs
NC
NC
O
H
Z
Z
Z
Z
L
Functional Description
The ’ABT374 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D inputs that meet the setup and hold time require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs
are in a high impedance state. Operation of the OE input
does not affect the state of the flip-flops.
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
Function
DS100207-3

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