ucn5800 Allegro MicroSystems, Inc., ucn5800 Datasheet

ucn5800

Manufacturer Part Number

ucn5800

Description

Bimos Ii Latched Drivers

Manufacturer

Allegro MicroSystems, Inc.

Datasheet

1.UCN5800.pdf (12 pages)

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Note the UCN5800A (DIP) and the UCN5800L

(SOIC) are electrically identical and share a

common terminal number assignment.

5800

BiMOS II

LATCHED DRIVERS

GROUND

STROBE

Output Voltage, V

Supply Voltage, V

Input Voltage Range,

Continuous Collector Current,

Package Power Dissipation,

Operating Temperature Range,

Storage Temperature Range,

Caution: CMOS devices have input static

protection but are susceptible to damage when

exposed to extremely high static electrical

charges.

CLEAR

ABSOLUTE MAXIMUM RATINGS

at +25 C Free-Air Temperature

. . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . See Graph

. . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . .

. . . . . . . . . . . -0.3 V to V

AND

UCN5800A

UCN5800L

5801

. . . . . . . . . . . . . . 50 V

. . . . . . . . . . . . . . 15 V

-55 C to +150 C

-20 C to +85 C

500 mA

+ 0.3 V

OUTPUT

ENABLE

SUPPLY

OUT

COMMON

Dwg. PP-014A

5800

5801

ICs merge high-current, high-voltage outputs with CMOS logic. The

CMOS input section consists of 4 or 8 data (‘D’ type) latches with

associated common CLEAR, STROBE, and OUTPUT ENABLE

circuitry. The power outputs are bipolar npn Darlingtons. This merged

technology provides versatile, flexible interface. These BiMOS power

interface ICs greatly benefit the simplification of computer or micropro-

cessor I/O. The UCN5800A and UCN5800L each contain four latched

drivers; the UCN5801A, UCN5801EP, and UCN5801LW contain eight

latched drivers.

BiMOS latched-input driver ICs (UCN4400A and UCN4801A). These

second-generation devices are capable of much higher data input

rates and will typically operate at better than 5 MHz with a 5 V logic

supply. Circuit operation at 12 V affords substantial improvement over

the 5 MHz figure.

circuits. TTL circuits may mandate the addition of input pull-up resis-

tors. The bipolar Darlington outputs are suitable for directly driving

many peripheral/power loads: relays, lamps, solenoids, small dc

motors, etc.

inductive load transient suppression. The output transistors are

capable of sinking 500 mA and will withstand at least 50 V in the OFF

state. Because of limitations on package power dissipation, the simul-

taneous operation of all drivers at maximum rated current can only be

accomplished by a reduction in duty cycle. Outputs may be paralleled

for higher load current capability.

UCN5800L and UCN5801LW in surface-mountable SOICs; the

UCN5801A in a 22-pin DIP with 0.400" (10.16 mm) row centers; the

UCN5801EP in a 28-lead PLCC.

FEATURES

Always order by complete part number, e.g., UCN5801EP .

To 4.4 MHz Data Input Rate

High-Voltage,

High-Current Outputs

CMOS, NMOS,

TTL Compatible Inputs

The UCN5800A/L and UCN5801A/EP/LW latched-input BiMOS

The UCN5800A/L and UCN5801A/EP/LW supersede the original

The CMOS inputs are compatible with standard CMOS and NMOS

All devices have open-collector outputs and integral diodes for

The UCN5800A is furnished in a standard 14-pin DIP; the

BiMOS II LATCHED DRIVERS

AND

Automotive Capable

Output Transient Protection

Internal Pull-Down Resistors

Low-Power CMOS Latches

Related parts for ucn5800

ucn5800 Summary of contents

Page 1

... The power outputs are bipolar npn Darlingtons. This merged technology provides versatile, flexible interface. These BiMOS power interface ICs greatly benefit the simplification of computer or micropro- cessor I/O. The UCN5800A and UCN5800L each contain four latched OUTPUT ENABLE drivers; the UCN5801A, UCN5801EP, and UCN5801LW contain eight latched drivers ...

Page 2

... V DD 2.0 1.5 1.0 0.5 14-LEAD SOIC AMBIENT TEMPERATURE IN C 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1985, 1997, Allegro MicroSystems, Inc. COMMON OUT N GROUND TYPICAL BIPOLAR DRIVE Dwg. FP-016-1 22-PIN DIP C/W JA 28-LEAD PLCC C/W JA 14-PIN DIP, R ...

Page 3

AND BiMOS II LATCHED DRIVERS ELECTRICAL CHARACTERISTICS at T Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage Input Resistance Supply Current Clamp Diode Leakage Current Clamp Diode Forward Voltage NOTE: Operation of these devices with standard TTL ...

Page 4

AND BiMOS II LATCHED DRIVERS UCN5801A CLEAR STROBE ...

Page 5

AND BiMOS II LATCHED DRIVERS OUTPUT ENABLE (ACTIVE LOW) CLEAR STROBE UNIPOLAR WAVE DRIVE STROBE OUT 1 OUT 2 OUT 3 OUT ...

Page 6

... MAX 0.39 MIN 0.558 0.356 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Lead thickness is measured at seating plane or below. UCN5800A Dimensions in Inches (controlling dimensions 0.100 0.005 BSC MIN 0.775 0.735 0.150 0.115 Dimensions in Millimeters ...

Page 7

... NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. UCN5800L Dimensions in Inches (for reference only 0.050 BSC 0.3444 0.3367 MIN. Dimensions in Millimeters (controlling dimensions 1.27 3 BSC 8.75 8.55 MIN. ...

Page 8

AND BiMOS II LATCHED DRIVERS 22 0.380 0.330 1 0.070 0.030 0.210 MAX 0.015 MIN 0.022 0.014 22 9.65 8.39 1 0.070 0.030 5.33 MAX 0.39 MIN 0.558 0.356 NOTES: 1. Exact body and lead configuration at vendor’s ...

Page 9

AND BiMOS II LATCHED DRIVERS 0.013 0.021 0.219 0.191 0.050 BSC 0.219 0.191 0.331 0.533 5.56 4.85 1.27 BSC 5.56 4.85 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance ...

Page 10

AND BiMOS II LATCHED DRIVERS 24 0.2992 0.2914 0.020 1 0.013 0.0926 0.1043 0.0040 24 7.60 7.40 0.51 1 0.33 2.65 2.35 0.10 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead ...

Page 11

AND BiMOS II LATCHED DRIVERS This page intentionally left blank ...

Page 12

... V‡ 450 Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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