m62320gp Renesas Electronics Corporation., m62320gp Datasheet
m62320gp
Available stocks
Related parts for m62320gp
m62320gp Summary of contents
Page 1
... M62320GP 8-bit I/O Expander for I Description The M62320GP is a CMOS 8-bit I/O expander, which has serial to parallel and parallel to serial data converting functions. It can communicate with a microcontroller via few wiring thanks to the adoption of the two-line I Parallel data I/O terminal can be set to input or output mode alternatively in individual bits. ...
Page 2
... Input 15 CS1 14 CS2 4 D0 Input/Output — GND — REJ03D0909-0100 Rev.1.00 Mar 25, 2008 Page M62320GP CS0 SCL 2 15 CS1 SDA 3 14 CS2 GND ...
Page 3
... M62320GP Absolute Maximum Ratings Item Symbol Supply voltage V DD Input voltage V l Output voltage V O Output current "Low" Output current "High" Power dissipation Pd Operating temperature Topr Storage temperature Tstg Recommended Operating Conditions • Supply voltage 5 • Input high voltage ...
Page 4
... M62320GP BUS Characteristics Item SCL clock frequency Free time: the bus must be free before a new transmission can start Hold time START Condition After this period, the first clock pulse is generated. Low period of the clock High period of the clock Set-up time for START condition ...
Page 5
... M62320GP Functional Blocks BUS Interface 2 The I C BUS interface recognizes start/stop conditions, a slave address and a write/read mode selection by receiving SDA, SCL, CS0, CS1 and CS2 signals and then the latch pulses, dedicated to each data latch are generated. Data Latch This IC has 3 types of data latch: the I/O setting data latch, the input data latch and the output data latch and each latch ...
Page 6
... Read mode: Parallel data input to I First S Slave address W A Transmission from Master (MCU etc.) to Slave (M62320GP) Transmission from Slave (M62320GP) to Master (MCU etc.) • S: Start condition While SCL level is high, SDA line level should be changed from high to low. • Slave address First MSB 0 ...
Page 7
... M62320GP Functional Description All parallel data I/O terminals are set to the input-state after power-on. In case any terminals need to be set to the output state, the corresponding terminals should be set during the write mode. This setting is hold until a next setting. In the write mode, 8 bits data can be transmitted from the I slave address and I/O setting ...
Page 8
... M62320GP • In case the I/O setting is different between each terminals. An example: the parallel port terminals and are assigned as output and input terminals, respectively. Start condition Slave address SDA SCL ...
Page 9
... M62320GP Typical Application Chip select data MCU Precaution for Use • Purchase of Renesas’ components conveys a license under the Philips I 2 components system, provided that the system conforms to I REJ03D0909-0100 Rev.1.00 Mar 25, 2008 Page µ ...
Page 10
... M62320GP Package Dimensions JEITA Package Code RENESAS Code P-SSOP16-4.4x5-0.65 PRSP0016JA Index mark * REJ03D0909-0100 Rev.1.00 Mar 25, 2008 Page Previous Code MASS[Typ.] 16P2Z-A 0.08g F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET ...
Page 11
Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained ...