upa1756g Renesas Electronics Corporation., upa1756g Datasheet

upa1756g

Manufacturer Part Number

upa1756g

Description

Switching N-channel Power Mos Fet Industrial Use

Manufacturer

Renesas Electronics Corporation.

Datasheet

1.UPA1756G.pdf (8 pages)

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Document No. D12909EJ2V0DS00 (2nd edition)

Date Published May 2001 NS CP (K)

Printed in Japan

ORDERING INFORMATION

ABSOLUTE MAXIMUM RATINGS (T

Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this

DESCRIPTION

Transistor designed for power management

application of notebook computers, and Li-ion

battery application.

FEATURES

Drain to Source Voltage (V

Gate to Source Voltage (V

Drain Current (DC)

Drain Current (Pulse)

Total Power Dissipation (1 unit)

Total Power Dissipation (2 unit)

Channel Temperature

Storage Temperature

Notes 1. PW

This product is Dual N-Channel MOS Field Effect

Dual MOS FET chips in small package

2.5-V gate drive type and low on-resistance

Low C

Built-in G-S protection diode

Small and surface mount package (Power SOP8)

DS(on)1

DS(on)2

PART NUMBER

2. T

device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage

may be applied to this device.

iss

PA1756G

= 30 m MAX. (V

= 40 m MAX. (V

= 25 °C, Mounted on ceramic substrate of 2000 mm

iss

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

= 800 pF TYP.

s, Duty Cycle

Note1

= 0 V)

= 4.5 V, I

= 2.5 V, I

Note2

Power SOP8

PACKAGE

1 %

N-CHANNEL POWER MOS FET

The mark

D(pulse)

= 3.0 A)

D(DC)

= 25 °C)

GSS

DSS

stg

DATA SHEET

INDUSTRIAL USE

SWITCHING

shows major revised points.

55 to +150

MOS FIELD EFFECT TRANSISTOR

±12.0

±6.0

±24

150

1.7

2.0

x 1.1 mm

PACKAGE DRAWING (Unit : mm)

5.37 Max.

°C

0.40

1.27

+0.10

–0.05

0.78 Max.

EQUIVALENT CIRCUIT

Gate

Protection

Diode

0.12 M

7, 8

5, 6

0.5 ±0.2

; Source 1

; Gate 1

; Drain 1

; Source 2

; Gate 2

; Drain 2

6.0 ±0.3

Source

Drain

4.4

PA1756

Body

Diode

0.8

0.10

1999

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upa1756g Summary of contents

Page 1

DESCRIPTION This product is Dual N-Channel MOS Field Effect Transistor designed for power management application of notebook computers, and Li-ion battery application. FEATURES Dual MOS FET chips in small package 2.5-V gate drive type and low on-resistance ...

Page 2

ELECTRICAL CHARACTERISTICS (T CHARACTERISTICS Drain to Source On-state Resistance Gate to Source Cut-off Voltage Forward Transfer Admittance Drain Leakage Current Gate to Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time ...

Page 3

TYPICAL CHARACTERISTICS (T A 1000 100 10 1 0.1 0.01 0.001 10 100 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 ˚ -50 A ˚C -25 ˚ 125 150 1 0 ...

Page 4

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 100 T - Channel Temperature -˚C ch CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10 000 1 000 100 10 0.1 1 ...

Page 5

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 100 120 140 160 T - Ambient Temperature - ˚C A FORWARD BIAS SAFE OPERATING AREA 100 Mounted on ceramic substrate of ...

Page 6

Data Sheet D12909EJ2V0DS PA1756 ...

Page 7

Data Sheet D12909EJ2V0DS PA1756 7 ...

Page 8

The information in this document is current as of May, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications ...

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