upa1751 Renesas Electronics Corporation., upa1751 Datasheet

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upa1751

Manufacturer Part Number
upa1751
Description
Switching Dual N-channel Power Mos Fet Industrial Use
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Document No. G10620EJ2V0DS00
Date Published April 1996 P
Printed in Japan
DESCRIPTION
fect Transistor designed for power management
application of notebook computers, and Li-ion bat-
tery application.
FEATURES
• Dual MOSFET chips in small package
• 4 V Gate Drive Type and Low On-Resistance
• Low C
• Built-in G-S Protection Diode
• Small and Surface Mount Package
ABSOLUTE MAXIMUM RATINGS (T
device acutally used, an additional protection circuit is externally required if voltage exceeding the rated voltage may
be applied to this device.
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse)*
Total Power Dissipation (1 unit)**
Total Power Dissipation (2 unit)**
Channel Temperature
Storage Temperature
* PW
** Mounted on ceramic substrate of 2000 mm
This product is Dual N-Channel MOS Field Ef-
R
R
(Power SOP8)
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
DS(on)1
DS(on)2
iss
= 37 m
= 64 m
10 s, Duty Cycle
C
iss
= 510 pF Typ.
Max. (V
Max. (V
DUAL N-CHANNEL POWER MOS FET
The information in this document is subject to change without notice.
GS
GS
= 10 V, I
= 4 V, I
MOS FIELD EFFECT POWER TRANSISTORS
1 %
D
V
V
I
I
P
P
T
T
D(DC)
D(pulse)
D
ch
stg
= 2.5 A)
DSS
GSS
T
T
= 2.5 A)
DATA SHEET
INDUSTRIAL USE
A
= 25 ˚C, all terminals are connected)
2
SWITCHING
–55 to +150
1.1 mm
150
1.7
2.0
30
5.0
20
20
8
1
5.37 Max.
PACKAGE DIMENSIONS
0.40
1.27
+0.10
–0.05
˚ C
˚ C
W
W
V
V
A
A
0.78 Max.
(in: millimeter)
5
4
0.12 M
Gate
Protection
Diode
Gate
1
2
7, 8
3
4
5, 6
PA1751
0.5 ±0.2
; Source 1
; Gate 1
; Drain 1
; Source 2
; Gate 2
; Drain 2
6.0 ±0.3
4.4
Source
Drain
©
Body
Diode
0.8
0.10
1996

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upa1751 Summary of contents

Page 1

DUAL N-CHANNEL POWER MOS FET DESCRIPTION This product is Dual N-Channel MOS Field Ef- fect Transistor designed for power management application of notebook computers, and Li-ion bat- tery application. FEATURES • Dual MOSFET chips in small package • ...

Page 2

ELECTRICAL CHARACTERISTICS (T Characteristics Symbol Drain to Source On-state Resistance R R Gate to Source Cutoff Voltage V Forward Transfer Admittance |y Drain Leakage Current I DSS Gate to Source Leakage Current I GSS Input Capacitance C Output Capacitance C ...

Page 3

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 100 120 140 160 T - Ambient Temperature - ˚C A FORWARD BIAS SAFE OPERATING AREA 100 Mounted on ceramic 2 substrate ...

Page 4

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1 000 100 10 1 0.1 0.01 0.001 10 100 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 V Pulsed T = –25 ˚ ˚ ˚C 125 ˚C 1 0.1 1 ...

Page 5

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 2 –50 50 100 150 T - Channel Temperature - ˚C ch CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 V ...

Page 6

REFERENCE Document Name NEC semiconductor device reliability/quality control system Quality grade on NEC semiconductor devices Semiconductor device mounting technology manual Semiconductor device package manual Guide to quality assurance for semiconductor devices Semiconductor selection guide Power MOS FET features and application ...

Page 7

PA1751 7 ...

Page 8

No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC ...

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