89ttm553 Integrated Device Technology, 89ttm553 Datasheet - Page 12

• Manufacturer Part Number: 89ttm553
• Description: Traffic Manager Co-processing Engine
• Manufacturer: Integrated Device Technology

A A A A C Characteristics
C Characteristics
C Characteristics
C Characteristics
IDT 89TTM553
Unless otherwise stated, the following parameters are provided given the conditions outlined in Table 13.
1.
The parameter is specified at 89TTM55x core clock frequency of 175 MHz.
Symbol
Symbol
Symbol
I
I
I
T
T
T
T
IH33PU
IH33PD
T
T
T
IL33PD
D
T
T
f
D
KQOV
KQOX
KQHZ
JSYS
CQIH
KQLZ
SYS
f
CQIS
KQV
KQX
T
T
SYS
ZB
ZB
H
S
Symbol
Pull Down)
Pull Down)
Pull Up)
(3.3v pads w/
(3.3v pads w/
(3.3v pads w/
Frequency for system (core) clock reference
Jitter requirements for system clock
Percentage duty for system clock
Frequency for ZBus clock
Percentage duty for ZBus clock
K/K rising edge to address/data output valid
K/K rising edge to address/data output invalid
C/C rising edge to data input setup
C/C rising edge to data input hold
Zbus clock high to output valid
Zbus clock high to output invalid
Zbus clock high to output low-Z
Zbus clock high to output high-Z
Input setup time from system clock
Input hold time from system clock
Input Leakage high current for 3.3V with Pull-
Up Inputs
Input Leakage low current for 3.3V with Pull-
Down Inputs
Input Leakage high current for 3.3V with Pull-
Down Inputs
Parameter
Parameter
Parameter
Parameter
Table 16 QDR SSRAM Interface Timing
Table 14 DC Parameters (Part 2 of 2)
Table 17 Zbus Interface Timing
Table 15 System Clock Timing
12 of 30
Min
-10
-10
10
Typical
Min
Min
Min
0.8
–0.2
2.5
1.0
1.0
3.0
45
33
45
—
—
—
—
—
0
+10
+10
200
1
Typical
Typical
Typical
100
Max
50
33
50
—
—
—
—
—
—
—
—
—
—
—
uA
uA
uA
Max
Max
Max
1.6
1.6
8.3
6.0
6.0
80
55
66
55
—
—
—
—
—
—
Units
1
Units
Units
Units
March 3, 2005
MHz
MHz
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%