cxa1784as Sony Electronics, cxa1784as Datasheet
cxa1784as
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cxa1784as Summary of contents
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... US Audio Multiplexing Decoder For the availability of this product, please contact the sales office. Description The CXA1784AS designed as a decoder for the Zenith TV Multi-channel System and also corresponds with BUS. Functions include stereo demodulation, SAP (Separate Audio Program) demodulation, dbx noise reduction and sound processor ...
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... Block Diagram AUXIN AUXIN-L MAININ 13 14 MAINOUT SUBOUT 19 PLINT 15 STFIL 16 BASS TREB BASS TREB PREVOL SURR BASS TREBLE – 2 – CXA1784AS SURR-VOL 4 SURROUT VOL-S 5 VOL-R LSOUT-R VOL-L 6 LSOUT-L VOL-R VOL-L 32 VCATC 31 VCAWGT 30 VCAIN 29 VEOUT 28 VETC 27 VEWGT STIN 25 SAPIN 24 SAPOUT ...
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... 500 4 500 5 6 – 3 – CXA1784AS ( ° Description BASS filter pin. (Left channel (Connect capacitor between Pins 1 and 42.) The cutoff frequency is determined by the built-in resistor and the external capacitance. BASS filter pin. (Right ...
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... 40k 10 80k 10k 3k 147 V 9.7k 19.4k CC 11k 4 11 2.06k – 4 – CXA1784AS Description Serial data I/O pin. V > 3 < 1 Serial clock input pin. V > 3 < 1 Digital block GND. Slave address control switch. The slave address is selected by changing the voltage applied to this pin ...
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... CXA1784AS Description 30k Set the filter and VCO reference current. The reference current is adjusted with the BUS DATA based on the current which flows to this pin. (Connect (±1%) resistor between this pin and GND ...
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... Vcc 2k 2k 10P 4k 500 19 147 14.4k 500 – 6 – CXA1784AS Description V CC Stereo block PLL loop filter integrating pin. 16 Audio multiplexing signal input pin Set the time constant for the SAP carrier detection circuit. (Connect a 4.7 µF capacitor between this pin and GND.) ...
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... V CC 7.5k 147 – 7 – CXA1784AS Description V CC Input the ( signal from SUBOUT (Pin 19). 25 Input the (SAP) signal from SAPOUT (Pin 24). Supply voltage pin. Vcc Set the time constant for the noise detection circuit. ...
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... V CC 47k 47k 20k – 8 – CXA1784AS Description Weight the variable de- emphasis control effective value detection circuit. (Connect a 0.047 µF capacitor and resistor in series between this pin and GND.) Determine the restoration time constant of the variable de-emphasis control effective value detection circuit ...
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... 500 34 500 35 – 9 – CXA1784AS Description CC Weight the VCA control effective value detection circuit. (Connect a 1 µF capacitor and a 3.9 k resistor in series between this pin and GND.) Determine the restoration time constant of the VCA control effective value detection circuit ...
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... CC 23k 20k 40k 500 20k 24k V CC 500 39 – 10 – CXA1784AS Description — Right channel external input pin. Left channel external input pin. Set the central frequency of the SURROUND circuit phase shifter. The frequency is determined by the built-in resistor and the external capacitance. ...
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... HD t LOW t HIGH t :STA SU t :DAT HD t :DAT :STO ;DAT HIGH HD t ;DAT SU – 15 – CXA1784AS Min. Typ. Max. Unit 3.0 — 5 — 1.5 IL — — 10 µA — — — 0 — — mA — — ...
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... Electrical Characteristics Measurement Circuit – 16 – CXA1784AS ...
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... TV decoder output selection 0 0 External forced MONO OFF 1 Mute OFF 1 — — Fixed by the set specifications — – 17 – CXA1784AS Setting value when electrical characteristics are measured Adjustment point Standard setting value Standard setting value Standard setting value Standard setting value ...
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... Adjust to the center of the 600mVrms (STLPF) STLPF = 1 condition 88kHz STA4 Adjust to the center of the 110mVrms (SAPLPF) SAPLPF = 1 condition ST-L 30% TVOUT-R output Minimize the output level 300Hz level ST-L 30% TVOUT-R output Minimize the output level 3kHz level – 18 – CXA1784AS Test mode setting TEST-DA=1 TEST1=1 TEST1=1 ...
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... Align STLPF with the center of the STA3 = 1 (adjustment OK) condition range free running) frequency input state, and adjust “STVCO” H (62.936 kHz) as possible. H Adjustment point Control data "SAPVCO" F Measurement data STA7 "SAPVCO1" STA8 "SAPVCO2" Adjustment point – 19 – CXA1784AS Control data "STLPF" 3F Measurement data STA3 "STLPF" ...
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... TVOUT-R output to the minimum. 4. Then, the adjustments in 2 and 3 above are performed to optimize the separation. 5. “WIDEBAND” Adjustment range: ±30% Adjustment bits: 6 bits Adjustment point Control data "SAPLPF" F Measurement data STA4 "SAPLPF" “SPECTRAL” Adjustment range: ±15% Adjustment bits: 6 bits – 20 – CXA1784AS ...
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... SAP DECODER MODE DET CONTROL VARIABLE FIXED DEEMPHASIS (VE OUT) DEEMPHASIS (VCA A 29 4.7µ HPF RMS LPF DET LPF RMS DET Fig 3. dbx-TV block – 21 – CXA1784AS 15 SAP dbx-TV NR TELEMETRY FM 10kHz FM 3kHz 50-10kHz 6. =15.734kHz H (MAIN IN) 13 MATRIX (Lch) ...
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... BASS TREBLE SURROUND Fig. 4. Sound processor block as a carrier as shown in the Fig. 1. First, the SAP signal only is H carrier amplitude. NOISE discrimination is performed by detecting the – 22 – CXA1784AS (LSOUT-L) VOL-L 6 (LSOUT-R) 5 VOL-R (SURROUT) - ...
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... Lout = Lin Rout = Rin When surround is ON (SURR = 1) 1-j RC Lout = Lin- (Lin-Rin) { 1+j RC 1-j RC Rout = Rin+ (Lin-Rin) 1 (IC on-chip 0.022 µF (Externally attached to Pin 39) (Lin, Lout) and (Rin, Rout) indicate the left- and right- channel I/O of the surround circuit. – 23 – CXA1784AS ...
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... COMPIN AUXIN — — 1 MONO, 25kHz Deviation, Pre-Em. off 2 MONO, 25kHz Deviation, Pre-Em VOLUME MAX, PREVOL MAX Input level TVOUT output level 1 245mVrms 2 490mVrms 1 490mVrms 1 100mVrms 490mVrms 490mVrms – 24 – CXA1784AS 3 LSOUT output level 2 490mVrms 490mVrms ...
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... VOL-R (6) Rch vol cont. VOL-SURR (6) Surr vol cont. STA4 STA5 BIT4 BIT3 NOISE — STA4 STA5 BIT4 BIT3 SAPLPF — – 25 – CXA1784AS BIT2 BIT1 BIT0 ATT (4) INPUT LEVEL adj FOMO SAPC M1 PR-VOL (4) Pre vol cont. TREBLE (4) BASS (4) : Don't Care STA6 STA7 ...
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... Forced MONO for external input (1: forced MONO ON) Selection of TVOUT mute ON/OFF U (0: mute ON, 1: mute OFF) Selection of LSOUT mute ON/OFF U (0: mute ON, 1: mute OFF) S Select of standard input level. S Select of standard input level. Selection of SAP mode mode according to the S presence of SAP broadcasting – 26 – CXA1784AS Contents ...
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... SPECTRAL (6): Perform high frequency ( kHz) separation adjustment Level max. 3F= Level min. WIDEBAND (6): Perform low frequency (fs = 300 Hz) separation adjustment Level min. 3F= Level max. Contents standard input level -5 +3 ±20% fo ±20% fo ±20% fo ±20% – 27 – CXA1784AS 1: RESET 1: Stereo 1: SAP 1: Noise 1: OK range 1: OK range ...
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... TREBLE (4): LSOUT output treble control 0 = Treble Min. 7 & Treble Center (0 dB Treble Max. BASS (4): LSOUT output bass control 0 = Bass Min. 7 & Bass Center (0 dB Bass Max. SAP BPF OUT NR BPF OUT DA control DC level STEREO VCO oscillation frequency (4fH) – 28 – CXA1784AS ...
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... External input is forced MONO. Input the same signal to both AUXIN-L and AUXIN-R. M1 (1): Mute the TVOUT-L and TVOUT-R output Mute Mute OFF M2 (1): Mute the LSOUT-L and LSOUT-R output Mute Mute OFF Standard input level } 245mVrms = 1 490mVrms 100mVrms – 29 – CXA1784AS ...
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... Regardless of the presence of SAP discrimination, dbx input: “SAP” left channel: SAP, right channel: SAP However, when there is no SAP, SAPOUT output is soft muted (-7 dB) “Forced MONO” “MUTE” “TV mode/external input mode selection” “TEST1” “TEST-DA” – 30 – CXA1784AS SAPC=1 ...
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... CXA1784AS dbx Output SAPC input Lch Rch 1 MUTE L+R L+R 1 SAP SAP SAP 1 SAP L+R SAP 1 MUTE L+R L+R 1 (SAP) (SAP) (SAP) 1 (SAP) L+R (SAP MUTE ...
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... CXA1784AS dbx Output SAPC input Lch Rch 0 MUTE L+R L+R 0 MUTE L+R L+R 0 MUTE L+R L+R 0 (SAP) (SAP) (SAP) 0 (SAP) L+R (SAP MUTE L+R L MUTE ...
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... Selected according to MUTE the EXT1, EXT2, EXTFOMO conditions Selected according to the EXT1, EXT2, MUTE EXTFOMO conditions L – 33 – CXA1784AS LS OUT-L LS OUT-R TV mode R channel TV mode R channel TV mode R channel EXT mode R channel EXT mode L channel EXT mode R channel EXT mode L channel Selected according to ...
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... P ACK 2 C controller) H during Read ACK MSB DATA – 34 – CXA1784AS MSB LSB HIZ HIZ ACK Sub Address ACK Data can be transferred in 8-bit units to be set as required. Sub address is incremented automatically. HIZ DATA ...
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... Standard level (100%) –10 0 Input level (dB) Input level vs. Distortion characteristics 2 (Stereo) Input signal: Stereo (dbx-TVNR ON), 1 kHz 100% modulation level kHz using LPF, ST mode CC Measurement point: TVOUT-L/R 1.0 10 –10 10 – 35 – CXA1784AS Standard level (100 Input level (dB) ...
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... Frequency (kHz) SAP frequency characteristics and group delay Gain 10 0 –10 Group delay 3.8f – 100 Frequency (kHz) – 36 – CXA1784AS 100 70 100 100 120 ...
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... Input: AUXIN (Pins 37 and 38) -80 1 kHz,490mVrms Output: LSOUT (Pins 4, 5 and 6) -100 Control data VOL-L, VOL-R, VOL-SURR – 37 – TREBLE. MAX TREBLE. MIN AUXIN (Pins 37 and 38) 245 mVrms LSOUT (Pins 4, 5 and CXA1784AS ...
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... SONY CODE EIAJ CODE JEDEC CODE 42PIN SDIP (PLASTIC) 600mil + 0.4 37.8 – 0 1.778 ± 0.25 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL SDIP-42P-02 LEAD TREATMENT LEAD MATERIAL SDIP042-P-0600-A PACKAGE WEIGHT – 38 – CXA1784AS 0° to 15° EPOXY RESIN SOLDER PLATING COPPER / 42 ALLOY 4.4g ...