ls7210 LSI Computer Systems, Inc., ls7210 Datasheet

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ls7210

Manufacturer Part Number
ls7210
Description
Programmable Digital Delay Timer
Manufacturer
LSI Computer Systems, Inc.
Datasheet

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Part Number:
LS7210
Quantity:
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Company:
Part Number:
LS7210
Quantity:
445
7210-061606-1
FEATURES:
• Programmable Delay from 6ms to "Infinity"
• Can be Cascaded for Sequential Events or Extended Delay
• +4.75V to +15V Operation (Vss - V
• On Chip Oscillator or External Clock time base
• High Noise Immunity
• LS7210 (DIP); LS7210-S (SOIC) - (See Figure 1)
DESCRIPTION:
The LS7210 is a MOS programmable digital timer that can generate
a delay in the range of 6ms to infinity. The delay is programmed by 5
binary weighted input bits in combination with the time base pro-
vided. The chip can be operated in four different modes: Delayed
Operate, Delayed Release, Dual Delay and One Shot. These modes
are selected by the control inputs A and B.
INPUT/OUTPUT DESCRIPTION:
OSCILLATOR Input (Pin 5)
The frequency of the internal oscillator is set by an RC network con-
nected to the OSC input, as shown in Figure 2. The nominal os-
cillator frequency, f, at room temperature is given by f
R values range from a minimum of 47K to a maximum 3M .
NOTE: Oscillation accuracy from chip to chip for a fixed value of RC,
is + 10%. (Parts can supplied to tighter tolerances.)
EXTERNAL CLOCK Input (Pin 6)
If the internal oscillator is not used, the chip can be driven by an ex-
ternal clock applied to this input.
CLOCK SELECT Input (Pin 4)
The internal oscillator or the external clock is selected by the proper
logic level applied to this input. A logic 1 selects the external clock
and logic 0 selects the internal oscillator. (See Note 1)
TRIGGER Input (Pin 3)
A positive or a negative transition at the trigger input initiates a delay
in turning on or off the output. A negative transition always turns on
the output with or without delay depending on the selected mode. A
positive transition at the trigger input always turns off the output (with
the exception of one-shot mode) with or without delay depending on
the selected mode. The delay is a function of the time base fre-
quency and the weighting factor programmed at the weighting bit in-
puts. The trigger input is clocked into the input latch with the neg-
ative edge of the selected time base clock. All timings begin after the
latch has been set up. (See Note 1)
WEIGHTING FACTOR Inputs, WB0-WB4 (Pins 12-8)
A delay from the trigger input to the output is programmed by ap-
plying 1's complement binary weighted numbers at these 5 inputs.
(See Note 1) The exact equation for the delay is:
Delay = (1 + 1, 023N)
U L
A3800
®
LSI/CSI
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
f
PROGRAMMABLE DIGITAL DELAY TIMER
N = Weighting Factor
f = Oscillation Frequency
DD
)
1/RC where
Example: For a weighting factor of 25, inputs WB4, WB3, and
WB0 should be programmed to logic 0.
MODE SELECT Inputs A, B (Pins 2, 1)
The chip can be programmed to operate in four different modes
by applying the logic levels to inputs A and B as indicated in
Table 2. The mode select inputs are clocked into the input latch-
es with the negative edge of the time base clock. These inputs
should not be changed while a delay timing is in progress.
(See Note 1)
OUT Output (Pin 13)
The output is an open drain FET. To obtain proper switching of
the output between Logic 0 and 1 levels, an external pull down re-
sistor to V
source, no such pull down is needed. The output is logically in-
verted with respect to the trigger input.
V
Supply voltage positive, negative terminals.
NOTE 1: These inputs have internal pullup resistors.
SS
EXTERNAL CLOCK
, V
CLOCK SELECT
DD
OSCILLATOR
TABLE 1. WEIGHTING BITS ASSIGNMENTS
CONTROL
A
1
1
0
0
(Pins 14, 9)
DD
TRIGGER
INPUTS
V
must be used. If the output is used only as a current
DD
WB0
WB1
WB2
WB3
WB4
TABLE 2. MODE SELECTION
(-V)
B
1
0
1
0
B
A
PIN ASSIGNMENT - TOP VIEW
(631) 271-0400 FAX (631) 271-0405
LS7210
7
1
6
2
3
4
5
FIGURE 1
VALUE
16
1
2
4
8
MODE
Dual Delay
Delayed Release
Delayed Operate
One Shot
14
13
12
11
10
9
8
V
OUT
WB0
WB1
WB2
WB3
WB4
SS
June 2006
(+V)

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ls7210 Summary of contents

Page 1

... High Noise Immunity • LS7210 (DIP); LS7210-S (SOIC) - (See Figure 1) DESCRIPTION: The LS7210 is a MOS programmable digital timer that can generate a delay in the range of 6ms to infinity. The delay is programmed by 5 binary weighted input bits in combination with the time base pro- vided ...

Page 2

MODE DEFINITION TIMING DIAGRAM: (See Figure 3) DUAL DELAY MODE Thls is the Default Mode when the inputs A and B are left un- programmed. The function of the Dual Delay mode is to provide a time delay on both ...

Page 3

... D - Output remains off in Delayed Operate mode due to positive trigger transition before the turn-on delay is over One-Shot period extended by re-triggering. Note: is the programmed delay. DELAYED RELEASE MODE PROGRAMMED TURN-OFF DELAY FIGURE 4. LS7210 TIMING DIAGRAM (C) (D) (A) (B) ONE-SHOT MODE < ...

Page 4

... Inputs Dual-Delay mode. For symmetical flasher tie Pins 8, 9, 10, 11 and 12 to fixed logic level. NOTE: 7210-061606-4 CLOCK SELECT LOGIC PRESCALER ÷ 1023 (SEE NOTE) POR GENERATOR FIGURE 5. LS7210 BLOCK DIAGRAM NOTE: ÷ 1023 is standard. Any number from 1 to 1022 can be mask programmed. FIGURE 6. ASYMMETRICAL FLASHER OUT 12 WB0 ...

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