lc72134m Sanyo Semiconductor Corporation, lc72134m Datasheet - Page 7

• Manufacturer Part Number: lc72134m
• Description: Dual Pll Frequency Synthesizer For Fm Tuner Systems
• Manufacturer: Sanyo Semiconductor Corporation

Continued from preceding page.
IFIN2/I1
AOUTb
FMINb
IFIN1
AINb
PDb
Pin
Pin No.
15
13
12
11
10
9
IF counter 1
IF counter 2
input port
Sub PLL local
oscillator
signal input
Sub PLL
charge pump
output
Sub PLL low-
pass filter
amplifier
transistor
Type
• IFIN1 is selected when LCTS in the serial data is set to 0.
• The input frequency range is 0.4 to 25 MHz when IFS is 1, and 0.4 to 12 MHz
• The signal is passed directly to the IF counter.
• The result is output, MSB first, through the DO pin.
• Four measurement periods are supported: 4, 8, 32, and 64 ms.
• IFIN2 is selected when both LCTS and L/I1 in the serial data are set to 1.
• The input frequency range is 0.4 to 25 MHz when IFS is 1 and 0.4 to 12 MHz
• The signal is passed directly to the IF counter.
• The result (the IF counter value) is output, MSB first, through the DO pin.
• Four measurement periods are supported: 4, 8, 32, and 64 ms.
• If the L/I1 bit in the serial data is set to 0, the IFIN2/I1 port will function as an input
• FMINb is selected when SDVS in the serial data is set to 1.
• The input frequency range is 10 to 160 MHz.
• The signal is passed through an internal divide-by-two prescaler and then input to
• The divisor can be set to a value in the range 272 to 8191. Since the internal
• FMINb goes to the stopped state (pulled down) when SDVS in the serial data is
• Sub PLL charge pump output
• Connections for the n-channel MOS transistor used for the sub PLL active low-
when IFS is 0.
when IFS is 0.
port and the state of the input pin will be reported to the microcontroller from the
DO pin. (Note that the LCTS value is ignored in this case.)
When the input state is low: the data will be 0:
When the input state is high: the data will be 1:
the swallow counter.
divide-by-two prescaler is used, the actual divisor will be twice the set value.
set to 0.
A high level is output from the PD pin when the frequency of the local oscillator
signal divided by N is higher than the reference frequency, and a low level is
output when that frequency is lower. This pin goes to the high-impedance state
when the frequencies match.
pass filter.
LC72134M
Function
Equivalent circuit
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