lc72135m Sanyo Semiconductor Corporation, lc72135m Datasheet - Page 13
lc72135m
Manufacturer Part Number
lc72135m
Description
Pll Frequency Synthesizer For Electronic Tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LC72135M.pdf
(24 pages)
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Continued from preceding page.
3. DO Output Data (Serial Data Output)
4. DO Output Data
(11)
(12)
(13)
No.
No.
(1)
(2)
(3)
• OUT Mode
IF counter control data
IFS
LSI test data
TEST 0 to 2
DNC
I/O port data
I2, I1
PLL unlock data
UL
IF counter binary data
C19 to C0
Control block/data
Control block/data
• This data should be set to 1 during normal operation.
• Note that if this value is set to zero the system enters input sensitivity degradation mode,
• LSI test data
These test data are set to 0 automatically after the power-on reset.
Don’t care. This data must be set to 0.
• Latched from the pin states of the LCTR/I1 input port (L/I1 bit is set to 0)
• Latched from the state of the unlock detection circuit.
• Latched from the value of the IF counter (20-bit binary counter).
and the sensitivity is reduced to 10 to 30 mV rms.
* See the “IF Counter Operation” item for details.
TEST0
TEST1
TEST2
and the IO2 I/O port.
These values follow the pin states regardless of the input or output setting.
Data is latched when the data output mode is entered.
I1
I2
UL
UL
C19
C0
LCTR/I1 pin state
IO2 pin state
0: Unlocked
1: Locked or detection stopped mode
LSB of the binary counter
MSB of the binary counter
These values must all be set to 0.
High: 1
Low: 0
LC72135M
Functions
Functions
L/I1
IOC2
UL0,
UL1
CTE,
GT0,
GT1
Related data
Related data
No. 5175-13/24