lc72135m Sanyo Semiconductor Corporation, lc72135m Datasheet - Page 18

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lc72135m

Manufacturer Part Number
lc72135m
Description
Pll Frequency Synthesizer For Electronic Tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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2. IF Counter Operation
HCTR minimum input sensitivity standard
Note: Values in parentheses are actual performance values presented as reference data.
1: Normal mode
0: Degradation mode
Note: When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD (station
Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0.
The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched by the
LC72135M when the CE pin is dropped from high to low. The IF signal must be supplied to the HCTR and LCTR
pins in the period between the point the CE pin goes low and the end of the wait time at the latest. Next, the value of
the IF counter at the end of the measurement period must be read out during the period that CTE is 1. This is because
the IF counter is reset when CTE is set to 0.
IFS
Note that the LC72135M input sensitivity can be controlled with the IFS bit in the serial data.
Reduced sensitivity mode (IFS = 0) must be selected when this IC is used in conjunction with an IF-IC that
does not provide an SD output and auto-search is implemented using only IF counting.
detect) signal and only after determining that the SD signal is present turn on IF buffer output and execute an
IF count operation. Autosearch techniques that use only the IF counter are not recommended, since it is
possible for IF buffer leakage output to cause incorrect stops at points where there is no station.
(10 to 15 mVrms)
(0.1 to 3 mVrms)
0.4 ≤ f < 0.5
40 mVrms
70 mVrms
0.5 ≤ f < 8
40 mVrms
70 mVrms
LC72135M
(30 to 40 mVrms)
(1 to 10 mVrms)
40 mVrms
70 mVrms
8 ≤ f ≤ 12
f (MHz)
No. 5175-18/24

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