km62256c Samsung Semiconductor, Inc., km62256c Datasheet
km62256c
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km62256c Summary of contents
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... KM62256C Family Document Title 32Kx8 bit Low Power CMOS Static RAM Revision History Revision No History 0.0 Advance information 0.1 Initial draft 1.0 Finalize 2.0 Revise - Add 45ns part with 30pF test load 3.0 Revise - Change specification format and merge : Commercial, Extended, Industrial product in same datasheets. 4.0 Revise ...
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... Ground SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The KM62256C family is fabricated by SAMSUNG s advanced CMOS process technology. The family supports various operat- ing temperature ranges and has various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operation with low data retention current ...
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... KM62256C Family PRODUCT LIST Commercial Temp Product (0~70 C) Part Name Function KM62256CLP-5 28-DIP, 55ns, L-pwr KM62256CLP-5L 28-DIP, 55ns, LL-pwr KM62256CLP-7 28-DIP, 70ns, L-pwr KM62256CLP-7L 28-DIP, 70ns, LL-pwr KM62256CLG-5 28-SOP, 55ns, L-pwr KM62256CLG-5L 28-SOP, 55ns, LL-pwr KM62256CLG-7 28-SOP, 70ns, L-pwr KM62256CLG-7L 28-SOP, 70ns, LL-pwr ...
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... KM62256C Family RECOMMENDED DC OPERATING CONDITIONS Item Supply voltage Ground Input high voltage Input low voltage Note 1. Commercial Product : unless otherwise specified A Extended Product : T =- unless otherwise specified A Industrial Product : T =- unless otherwise specified A 2. Overshoot : V +3.0V in case of pulse width 30ns CC 3 ...
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... KM62256CL KM62256CL-L KM62256CLE Data retention current I DR KM62256CLE-L KM62256CLI KM62256CLI-L Data retention set-up time t SDR Recovery time t RDR Including scope and jig capacitance = KM62256CE Family : Speed Bins Symbol 55ns Min Max ...
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... KM62256C Family TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS OE High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...
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... KM62256C Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS WE Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE Data in Data out High-Z NOTES (WRITE CYCLE write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high the end of write ...
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... KM62256C Family PACKAGE DIMENSIONS 28 PIN DUAL INLINE PACKAGE(600mil) #28 13.60 0.20 0.535 0.008 #1 1. 0.065 28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil) #28 #1 0.89 0.41 0. 0.035 0.016 #15 #14 36.72 MAX 1.446 36.32 0.20 1.430 0.008 0.46 0.10 0.018 0.004 2.54 1.52 0.10 0.100 0.060 0.004 #15 11.81 0.30 0.465 0.012 #14 2.59 18.69 MAX 0.102 0.736 18.29 0.20 0.720 0.008 1.27 0.05 MIN 0.050 0.004 0.002 8 CMOS SRAM Units :millimeters(inches) 0 ...
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... KM62256C Family PACKAGE DIMENSIONS 28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.55 #14 0.0217 28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4R) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #14 0.55 0.0217 #1 0.25 TYP 0.010 0~8 0.45 ~0.75 0.018 ~0.030 13.40 0.20 0.528 0.008 #28 #15 13.40 0.20 0.528 0.008 #15 #28 11.80 0.10 +0.10 0.15 0.465 0.004 -0.05 +0.004 0.006 -0 ...