cxa2040aq Sony Electronics, cxa2040aq Datasheet
cxa2040aq
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cxa2040aq Summary of contents
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... I C Bus-Compatible Video Switch Description 2 The CXA2040AQ bus-compatible 5-input, 3-output video switch for TVs. Features 2 • Serial data control via I C bus • 5 composite video input systems • 2 Y/C (S terminal) input systems • 3 composite video output systems • 1 Y/C (S terminal) output system • ...
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... MUTE CV3 CV1 CV2 CV3 CV4 CV4 CV5 SW2 CV6 CV7 MUTE CV5 CV1 CV2 CV6 CV3 CV4 CV5 SW3 CV6 CV7 MUTE CV7 Y1 Y2 SW4 MUTE C1 C2 SW5 MUTE MUTE – 2 – CXA2040AQ CVOUT1 6dB 15 CVOUT2 13 CVOUT3 11 YOUT 9 COUT ...
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... V CC 200 1. – 3 – CXA2040AQ Description Y/C separation signal inputs. Biased to approximately 4.5V. Input the input signals through capacitors. Connect protective resistor of 220 between these pins and the capacitors. Y1 and Y2 pins: Luminance signals input. C1 and C2 pins: Chrominance signals input. Applying a DC voltage to S1 and ...
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... 1.2k 147 147 1.2k – 4 – CXA2040AQ Description Selects the slave address for the bus. 90H at 1.0V or less 92H at 3.5V or more 90H when open bus signal input. Connect protective resistor of 220 between this pin and the SCL line. ...
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... V CC 1.2k 22.5k 32 20k – 5 – CXA2040AQ Description Composite video signal input. Clamped to approximately 3.1V. Input the input signal through capacitor. Connect protective resistor of 220 between this pin and the capacitor. The composite video signal input to CV1 is also taken into the "SYNC DETECT circuit" of which SYNC is existed or not ...
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... I C bus 68k I/O CV1 0.1µ Vs1 Vs2 2.2µ 2.2µ 2.2µ – 13 – CXA2040AQ 10k V ADR 10µ CVOUT2 15 10µ 10k CVOUT3 10µ 10k NC 12 YOUT 11 10µ 10k NC 10 COUT 9 0.47µ 10k ...
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... ADR bus 68k I/O CV1 0.1µ 2.2µ 2.2µ 2.2µ 2.2µ – 14 – CXA2040AQ V ADR CVOUT2 CVOUT3 YOUT COUT 7 8 2.2µ C2 are ...
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... I C Bus Control Map 1) Control Register The CXA2040AQ control system is comprised of 4 bytes of control registers which control the various outputs. The inputs which are to be output are selected by writing the respective input data into the control register. S Slave address A DATA1 A DATA2 A DATA3 A DATA4 A P ...
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... DC voltages for S1 and S2 pins S1, S2 OPEN S1, S2 SEL 2V or less 4.75 to 7.25V 9.5 to 12V 3) POWER ON RESET The CXA2040AQ incorporates a POWER ON RESET function which sets each control register to "0" upon POWER ON. (Which goes to MUTE status.) The POWER ON RESET V has hysteresis. The POWER Also, the PONRES bit of the status register is read to determine whether the IC is reset upon POWER ON ...
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... C bus at a gain of 0 [dB] with 2 C bus amplified to +6 [dB] with respect to the input signal bus control register. The YOUT switch outputs 2 C bus control register. The COUT switch outputs – 17 – CXA2040AQ 2 C bus control / ...
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... Vcc 22 SYNCTC Duty Sync tip clamp and comparator discrimination the duty is less than 84%, sync is determined not 2 C. The duty discrimination block also has a time constant. After sync is – 18 – CXA2040AQ ...
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... 220 220 220 2.2µ 2.2µ 2.2µ – 19 – CXA2040AQ Composite video signal 0dB output 1 10µ Composite CVOUT2 video signal 15 +6dB output 2 10µ Composite CVOUT3 13 video signal 0dB output 3 10µ ...
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... Input pin 23 is clamped to approximately 3.1V. Therefore, care should be taken over the polarity of the coupling capacitor. • Output pins of Pins 9, 11, 13, 15 and 17 are biased between 3.8 and 4.8V. Therefore, care should be taken over the polarity of the coupling capacitor. – 20 – CXA2040AQ ...
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... SONY CODE QFP-32P-L01 EIAJ CODE QFP032-P-0707-A JEDEC CODE 32PIN QFP (PLASTIC 0.15 ± 0.12 M PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT – 21 – CXA2040AQ 0.1 + 0.35 1.5 – 0.15 + 0.2 0.1 – 0.1 + 0.1 0.127 – 0.05 0° to 10° EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g ...