cxd1947q Sony Electronics, cxd1947q Datasheet

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cxd1947q

Manufacturer Part Number
cxd1947q
Description
Ieee1394 Link Layer / Pci Bridge Lsi
Manufacturer
Sony Electronics
Datasheet
Overview
link layer protocol of the 1394 Serial Bus, with additional
features to support the transaction and bus management
layers.
tiple DMA engines to enable high performance bus
transfers.
Features
• 1394 Link Layer/PCI Bridge
• Conforms to IEEE1394 high speed Serial Bus
• Supports 100Mb/s and 200Mb/s 1394 bus speeds
• Conforms to PCI version 2.1 specification
• Supports 6 independent programmable DMA channels
• Three 128-word-deep FIFOs
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication
or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony
cannot assume responsibility for any problems arising out of the use of these circuits.
Block Diagram
MBIU:
ITDMA: Isochronous Transmit DMA
ATDMA: Asynchronous Transmit DMA
RDMA: Receive DMA
IRDMA: Isochronous Receive DMA
IEEE1394 LINK Layer / PCI Bridge LSI
— Asynchronous transmit (1)
— Asynchronous receive (1)
— Isochronous transmit (2)
— Isochronous receive (2)
— Asynchronous transmit
— Isochronous transmit
— Receive
The CXD1947Q is a single-chip implementation of the
The CXD1947Q includes a PCI bus interface and mul-
PCI BUS
Master Bus Interface
PCI INF
MBIU
ALIGN:
RF:
SSN INF: Silicon Serial Number
ITF:
ATF:
PRELIMINARY
SSN INF
ATDMA
RDMA
IRDMA
ITDMA
Data Aligner
Isochronous Transmit FIFO
Asynchronous Transmit FIFO
Receive FIFO
–1–
ROM INF
• Includes interfaces to
• Supports big and little Endian data formats
Device Structure
Recommended Operating Conditions
• Supply voltage
• Operating temperature range Topr –20 to +75
ALIGN
ALIGN
— 1394 PHY interface (CXD1944 or equivalent)
— ROM (64K x 8)
— Silicon Serial ROM
Silicon gate CMOS IC
ALIGN
CNTL REG
ITF
ATF
RF
PHY:
ROM INF:
CNTL REG: Control Registers
160 pin QFP
CXD1947Q
CORE
LINK
V
Link Layer/Physical Layer
1394 Interface
ROM Interface
DD
3.0 to 3.6
PHY
10/18/96
°C
V

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cxd1947q Summary of contents

Page 1

... The CXD1947Q is a single-chip implementation of the link layer protocol of the 1394 Serial Bus, with additional features to support the transaction and bus management layers. The CXD1947Q includes a PCI bus interface and mul- tiple DMA engines to enable high performance bus transfers. Features • 1394 Link Layer/PCI Bridge • ...

Page 2

... NC 150 PCIAD27 151 PCIAD26 152 PCIAD25 153 PCIAD24 154 VDD 155 VSS 156 NC 157 PCI_BE3 158 PCIIDSEL 159 VSS 160 160 PIN QFP –2– Preliminary CXD1947Q 80 VSS 79 ROMDT3 78 ROMDT2 77 VSS 76 VDD ROMDT1 73 ROMDT0 VSS 69 VDD 68 VST ...

Page 3

... PCI Interface This block acts both as a master and a slave on the PCI bus slave, it decodes and responds to access registers within CXD1947Q master, it acts on behalf of the DMA units to generate transactions on the PCI bus. These transactions are used to move streams of data between system memory and the devices, as well as to read and write the DMA command lists ...

Page 4

... Package Outline Unit: mm 120 121 160 1 0.3 0.1 0.13 160 pin QFP (Plastic) 31.2 0.2 28.0 0 0.65 M 0.15 0.1 0 -10 –4– Preliminary CXD1947Q +0.1 0.15 –0.05 0.1 3.45 0.25 ...

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