bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 91

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bt829bkrf

Manufacturer Part Number
bt829bkrf
Description
Video Streamii Decoders
Manufacturer
ETC-unknow
Datasheet

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Bt829B
VideoStream II Decoders
0x00—Device Status Register (STATUS)
\The MPU can read or write to this register at any time. Upon reset, it is initialized to 0x00. COF is the LSB. By
writing to the register, the COF and LOF status bits hold their values until reset to their default values. The other
six bits do not hold their values, but continually output the status. An asterisk indicates the default option.
PRES
HLOC
FIELD
NUML
CSEL
CCVALID
PRES
7
0
Video Present Status—Video is determined to be not present when an input sync is not
detected in 31 consecutive line periods.
Device in H-lock—If HSYNC is found within 1 clock cycle of the expected position of
HSYNC for 32 consecutive lines, this bit is set to a logical 1. Once set, if HSYNC is not found
within 1 clock cycle of the expected position of HSYNC for 32 consecutive lines, this bit is
set to a logical 0. MPU writes to this bit are ignored. This bit indicates the stability of the
incoming video. Although it is an indicator of horizontal locking, some video sources charac-
teristically vary from line-to-line by more than one clock cycle. This causes the bit to never be
set. Consumer VCRs are examples of sources that tend to never set this bit.
Field Status—This bit reflects whether an odd or even field is being decoded. The FIELD bit is
determined by the relationship between HRESET and VRESET.
Number of Lines—This bit identifies the number of lines found in the video stream. This bit is
used to determine the type of video input to the Bt829A. Thirty two consecutive fields with the
same number of lines is required before this status bit will change.
Crystal Select—This bit identifies which crystal port is selected. When automatic format
detection is enabled, this bit will be the same as NUML.
Valid Closed Caption Data—This bit indicates that valid closed caption or Extended Data Ser-
vices (EDS) sample pairs have been stored in the closed caption data registers. This bit indi-
cates that the closed caption data FIFO is half full. It is reset after being written to or when a
chip reset occurs.
HLOC
6
0
FIELD
5
0
0*
1
0*
1
0*
1
0*
1
0*
1
=
=
=
=
=
=
=
=
=
=
NUML
Video not present
Video present
Device not in H-lock
Device in H-lock
Odd field
Even field
525-line format (NTSC/PAL-M)
625-line format (PAL/SECAM)
XTAL0 input selected
XTAL1 input selected
4
0
D829BDSA
CSEL
3
0
CCVALID
0x00— Device Status Register (STATUS)
2
0
4.0 Control Register Definitions
LOF
1
0
COF
0
0
81

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