em78p468l ELAN Microelectronics Corp, em78p468l Datasheet - Page 18

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em78p468l

Manufacturer Part Number
em78p468l
Description
8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM78P468N/EM78P468L
8-Bit Microcontroller
12 •
6.1.14 RD/SBPCR (System, Booster and PLL Control Register)
Bit 1 (CNT2EN): Counter 2 enable bit
Bit 0 (CNT1EN): Counter 1 enable bit
Bit 7: Not used
Bits 6 ~ 4 (CLK2 ~ CLK0): main clock selection bits for PLL mode (code option select)
Bit 3 (IDLE): Idle mode enable bit. This bit will determine the intended mode of the
* NOP instruction must be added after SLEP instruction.
Example :
Bits 2, 1 (BF1, 0): LCD booster frequency select bit to adjust VLCD 2, 3 driving.
Bit 0 (CPUS): CPU oscillator source select, When CPUS=0, the CPU oscillator select
sub-oscillator and the main oscillator is stopped.
CLK2
Bit 7
0
0
0
0
1
(Address: 0Dh)
CPUS = “0”: sub-oscillator (Fs)
CPUS = “1”: main oscillator (Fm)
CNT2EN = “0” : Disable Counter 2. Stop counting operation.
CNT2EN = “1” : Enable Counter 2. Start counting operation.
CNT1EN = “0” : Disable Counter 1. Stop counting operation.
CNT1EN = “1” : Enable Counter 1. Start counting operation.
BF1
0
0
1
1
CLK1
Sleep mode : Idle bit = “0” +SLEP instruction + NOP instruction
CLK2
SLEP instruction.
Idle = ”0”+SLEP instruction → Sleep mode
Idle = ”1”+SLEP instruction → Idle mode
Bit 6
Idle mode : Idle bit = “1” +SLEP instruction + NOP instruction
0
0
1
1
×
CLK0
CLK1
Bit 5
BF0
0
1
0
1
×
0
1
0
1
CLK0
Bit 4
(This specification is subject to change without further notice)
Main clock
Booster Frequency
Fs×65/2
Fs×65/4
Fs×130
Fs×244
Fs×65
Bit 3
IDLE
Fs/16
Product Specification (V1.5) 02.15.2007
Fs/4
Fs/8
Fs
Bit 2
BF1
Example Fs=32.768K
1.065 MHz
4.26 MHz
2.13 MHz
Bit 1
BF0
532 kHz
8 MHz
CPUS
Bit 0

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