cxa3562r Sony Electronics, cxa3562r Datasheet

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cxa3562r

Manufacturer Part Number
cxa3562r
Description
Lcd Driver
Manufacturer
Sony Electronics
Datasheet
Description
with Sony polycrystalline silicon TFT LCD panels. It
supports digital 2-parallel and single input, and the
input data is analog demultiplexed into 12 phases and
output. The CXA3562R can directly drive an LCD
panel, and the VCOM setting circuit and precharge
pulse waveform generator are also on-chip.
Features
• Supports 10-bit 2-parallel and single input
• Supports signals up to UXGA
• Low output deviation by on-chip output offset cancel circuit
• Supports both line inversion and dot and line inversion
• On-chip timing generator with ECL
• VCOM voltage generation circuit
• Precharge pulse waveform generation circuit
Applications
Absolute Maximum Ratings (V
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation P
Recommended Operating Conditions
• Supply voltage
• Operating temperature
The CXA3562R is a driver IC developed for use
(1/2 clock when using UXGA signals)
LCD projectors and other video equipment
LCD Driver
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
V
V
Topr
Tstg
V
V
Topr
CC
DD
D
CC
DD
SS
= 0V)
–65 to +150
15.0 to 15.5
4.75 to 5.25
–20 to +70
–20 to +70
2300
5.5
16
mW
– 1 –
°C
°C
°C
V
V
V
V
CXA3562R
100 pin LQFP (Plastic)
E01115-PS

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cxa3562r Summary of contents

Page 1

... LCD Driver Description The CXA3562R is a driver IC developed for use with Sony polycrystalline silicon TFT LCD panels. It supports digital 2-parallel and single input, and the input data is analog demultiplexed into 12 phases and output. The CXA3562R can directly drive an LCD panel, and the VCOM setting circuit and precharge pulse waveform generator are also on-chip ...

Page 2

... S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H S/H FRP_OD FRP_EV TG CAL_PLS Offset Cancel Level Gen – 2 – CXA3562R VCOM Gen. 49 SH_OUT2 48 NC Line Inv. 47 SH_OUT3 Offset Cancel 46 NC Line Inv. 45 SH_OUT4 Offset Cancel Line Inv ...

Page 3

... GND 10µ 30k 17 GND – 3 – CXA3562R Description Dot clock input. PECL differential input or TTL input. For TTL input, input to MCLK and connect MCLKX to GND through a capacitor. LCD panel AC drive inversion timing input. High: inverted Low: non-inverted See the Timing Chart. ...

Page 4

... Connect directly to CAL_OL and CAL_OH, respectively. When 30k using two CXA3562R, connect 21 the CAL_IL and CAL_IH of both 22 chips to the CAL_OL and 20µ CAL_OH of only one CXA3562R. GND V DD Offset cancel function off. Normally connect to GND to 24k 24k 145 use with the offset cancel 24 function on ...

Page 5

... GND V DD 50k 192 70 200k GND – 5 – CXA3562R Description Precharge waveform output. SID_OUTX outputs the inverse of SID_OUT based on the output center voltage. These pins cannot directly drive the LCD panel, so input to the LCD panel with an external a buffer. Precharge level setting. ...

Page 6

... GND V DD 50k 192 71 GND – 6 – CXA3562R Description Power saving. Power saving mode when set to low level. Low (power saving mode) when open. Normally connect Power GND. Power 15V power supply. 5V power supply. ...

Page 7

... High: odd-numbered and even- numbered outputs inverted 200k Low: non-inverted GND V DD 50k 192 A port digital data input GND V DD 50k 192 B port digital data input 100 GND – 7 – CXA3562R Description ...

Page 8

... D_B1 100 D_B0 – 8 – CXA3562R 47p 47p V CC 360p SH_OUT2 48 360p NC 47 SH_OUT3 46 360p NC 45 SH_OUT4 360p SH_OUT5 42 ...

Page 9

... Value obtained by subtracting minimum value from maximum OUT1 OUT12 to OUT1 value at D_A[9:0]: 200h OUT1 OUT12 OUT12 and D_B[9:0]: 200h. (when using two CXA3562R) – 9 – CXA3562R Min. Typ. Max. Unit — 10 — bit 2 — — — — — 80 ...

Page 10

... Value obtained by subtracting minimum value from maximum OUT1 OUT12 value at D_A[9:0]: 000h OUT1 OUT12 or 3FFh and D_B[9:0]: 000h or 3FFh. (when using two CXA3562R) PRG: 0V; measure V SID_LV FRP: 0V, and V and V SID_LV FRP: 5V. Calculate SID1 SID(X) PRG: 5V; measure V PRG_LV ...

Page 11

... Digital IN 1. Digital input block The CXA3562R can be set to single input from only the A port or parallel input from both the A and B ports, and port switching by right/left inversion is also possible in parallel input mode. This makes it possible to support various systems. In single input mode, the signal is internally demultiplexed to 2-parallel format and input to the D/A converter. ...

Page 12

... CH1 to CH6 simultaneous output timing CH7 to CH12 simultaneous output timing – 12 – CXA3562R DAC DAC_O S/H DAC S CH1 to CH12 simultaneous output timing ...

Page 13

... CH1 to CH6 simultaneous output timing CH7 to CH12 simultaneous output timing – 13 – CXA3562R DAC DAC_O S/H DAC S ...

Page 14

... MCLKX input period as 1clk. SHST FRP The CXA3562R can select various operating modes according to the timing generator block settings. These settings are described below. • SL_DAT (Pin 72) Digital input selection. Single input from only the A port is selected when set to high level, and parallel input from both the A and B ports is selected when set to low level ...

Page 15

... SL_DAT is low by POSCTR[3:0] (Pins 6 to 9). The phase can be set in 16 ways by 4-bit digital input. The output phase shifts backward by the above unit each time this setting is increased by one bit. SH_OUT7 to 12 SH_OUT1 to 6 GND F/H_CNT: H – 15 – CXA3562R ...

Page 16

... Calibration level generator block The CXA3562R generates the offset cancel circuit reference with a calibration level generator in order to minimize the deviation between channels at the center level. The 200h output level is generated at both the AC output high and low sides, and these levels are DC output from CAL_OH and CAL_OL, respectively ...

Page 17

... SIG_OFST voltage vs. SH_OUT voltage <Measurement conditions> 5 SIG.C = 3.75V DATA = 200h 4 3 4.0 4.5 0.5 1.0 3.1 3.2 – 17 – CXA3562R Input data vs. SH_OUT voltage FRP = High FRP = Low <Measurement conditions> SIG.C = 3.75V SIG_OFST = 3.6V 100h 200h 300h 3FFh Input data (10 bits) FRP = High FRP = Low 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SIG_OFST voltage [V] ...

Page 18

... SID_LV voltage vs. SID_OUT voltage 16 <Measurement conditions> 14 SIG.C = 3.75V 12 FRP = High FRP = Low SID_LV voltage [V] PRG_LV voltage vs. SID_OUT voltage PRG_LV voltage [V] – 18 – CXA3562R <Measurement conditions> SIG.C = 3.75V FRP = High FRP = Low ...

Page 19

... CXA3562R 10k V DD OPEN V 1µF DD 20k 0.1µ 20k 0.1µF – 19 – CXA3562R Buffer 1 Psig V DD 20k 0.1µ COM 1 3 Vsig1 SH_OUT2 49 4 Vsig2 ...

Page 20

... CXA3562R 10k OPEN 1µF DD 20k 0.1µ 20k 0.1µF – 20 – CXA3562R Buffer 1 Psig V DD COMR 2 20k 0.1µF 21 COML 1 32 COM 1 3 Vsig1 SH_OUT2 ...

Page 21

... V DD OPEN V 1µF DD 20k 0.1µ 20k 0.1µF – 21 – CXA3562R Another CXA3562R 57 56 Buffer 2 Psig1 3 Psig2 4 Psig3 5 Psig4 V DD COMR 6 20k 0.1µF 25 COML 1 34 COM 1 7 Vsig-a1 ...

Page 22

... D_B1 99 D_B0 100 10k OPEN 0.47µF 0.47µ 20k 0.1µF 0.1µF – 22 – CXA3562R Buffer 1 Psig1 2 Psig2 1 11 Vsig1 SH_OUT2 49 13 Vsig3 SH_OUT3 47 15 Vsig5 NC ...

Page 23

... Notes on Operation The CXA3562R has high power consumption sure to take the following radiation measures. • Use four-layer substrate. • GND lines connected between Pins 11 to 15, Pins 36 to 40, Pins and Pins should be as thick as possible. – 23 – CXA3562R ...

Page 24

... A 26 (0.22 0. 0.2 1.5 – 0.1 DETAIL B : PALLADIUM NOTE: Dimension " " does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL LQFP-100P-L01 LEAD TREATMENT LEAD MATERIAL P-LQFP100-14x14-0.5 PACKAGE MASS – 24 – CXA3562R B 0 0.18 ± 0.03 EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.7g Sony Corporation ...

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