ml6652 Sirenza Microdevices, ml6652 Datasheet - Page 5

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ml6652

Manufacturer Part Number
ml6652
Description
10/100mbps Ethernet Fiber And Copper Media Converter With Auto-negotiation
Manufacturer
Sirenza Microdevices
Datasheet

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5
Pin No. Signal Name
PIN DESCRIPTIONS (continued)
Input Level
1/3 of VCC
2/3 of VCC
1/3 of VCC
2/3 of VCC
Pin Name
PECLTP
7
6
Voltage
VCC
VCC
0
0
PECLTP
AD10
LIW Function
TPOUTP/TPOUTN
TPINP/TPINN and
PECL/LVPECL
Disabled
Disabled
Enabled
Enabled
Interfaces at
Twisted Pair
Twisted Pair
Twisted Pair
AD4LIW
I / O
I
I
PHYAD4 Bit
January 2004
0
0
1
1
PECLTP
The copper interface is selected as shown in Table 2. When twisted pair
interface is selected, the scrambler and descrambler are enabled by default
and can be disabled with a management register bit.
When using twisted pair interface, this pin also defines the maximum
supported link distance. When the 10 meters maximum link length is selected,
the input is not equalized before being sliced.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
Default
Description
Sets the value of the PHY address bits 1 and 0 for accessing the Serial
Management Interface.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
<30.3>
0
1
0
0
PHYAD3 Bit
100BASE - TX
PCB Traces
PCB Traces
Table 1.
Table 2.
Standard
Copper
Length
0
1
1
0
10m
AD32
Final Datasheet
PHYAD2 Bit
SHORTTP
Default
<30.2>
0
0
1
1
0
0
1
1
PHYAD1 Bit
Standard
Standard
Current
Output
Low
NA
0
1
1
0
AD10
<30.4> Default
LOWITPOUT
DS6652-F-02
PHYAD0 Bit
ML6652
0
0
1
0
0
0
1
1

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