mx26l6419 Macronix International Co., mx26l6419 Datasheet - Page 19

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mx26l6419

Manufacturer Part Number
mx26l6419
Description
64m [x16] Single 3v Page Mode Mtp Memory
Manufacturer
Macronix International Co.
Datasheet
READ STATUS REGISTER COMMAND
The Status Register is read after writing the Read Status
Register command of 70H to the Command User Inter-
face. Also, after starting the internal operation the de-
vice is set to the Read Status Register mode automati-
cally.
The contents of Status Register are latched on the later
falling edge of OE or the first edge of CE that enables
the device OE must be toggle to VIH or the device must
be disable before further reads to update the status reg-
ister latch. The Read Status Register command func-
tions independently of the VPEN voltage.
CLEAR STATUS REGISTER COMMAND
The Erase Status, Program Status, Block Status bits
and protect status are set to "1" by the Write State Ma-
chine and can only be reset by the Clear Status Register
command of 50H. These bits indicates various failure
conditions.
P/N:PM0946
BLOCK ERASE COMMAND
Automated block erase is initiated by writing the Block
Erase command of 20H followed by the Confirm com-
mand of D0H. An address within the block to be erased
is required (erase changes all block data to FFH).
Block preconditioning, erase, and verify are handled in-
ternally by the WSM (invisible to the system). The CPU
can detect block erase completion by analyzing the sta-
tus register bit SR.7. Toggle OE, CE to update the status
register. The CUI remains in read status register mode
until a new command is issued. Also, reliable block era-
sure can only occur when VCC is valid and VPEN =
VPENH .
WRITE TO BUFFER COMMAND
To program the device, a Write to Buffer command is
issue first. A variable number of bytes, up to the buffer
size, can be loaded into the buffer and written to the
MTP device. First, the Write to Buffer Setup command
is issued along with the Block Address (see Figure 4,
Write to Buffer Flowchart on page 25). After the com-
mand is issued, the extended Status Register (XSR) can
19
be read when CE is VIL. XSR.7 indicates if the Write
Buffer is available.
If the buffer is available, the number of words to be pro-
gram is written to the device. Next, the start address is
given along with the write buffer data. Subsequent writes
provide additional device addresses and data, depend-
ing on the count. After the last buffer data is given, a
Write Confirm command must be issued. The WSM be-
ginning copy the buffer data to the MTP array.
If an error occurs while writing, the device will stop writ-
ing, and status register bit SR.4 will be set to a "1" to
indicate a program failure. The internal WSM verify only
detects errors for "1" that do not successfully program
to "0" . If a program error is detected, the status register
should be cleared. Any time SR.4 and/or SR.5 is set, the
device will not accept any more Write to Buffer com-
mands. Reliable buffered writes can only occur when VCC
is valid and VPEN = VPENH. Also, successful program-
ming requires that the corresponding block lock-bit be
reset.
WORD PROGRAM COMMANDS
Word program is executed by a two-command sequence.
The Word Program Setup command of 40H is written to
the Command Interface, followed by a second write speci-
fying the address and data to be written. The WSM con-
trols the program pulse application and verify operation.
The CPU can detect the completion of the program event
by analyzing the status register bit SR.7.
If a word program is attempted while VPEN_V PENLK,
status register bits SR.4 and SR.3 will be set to "1".
Successful word programs require that the correspond-
ing block lock-bit be cleared. If a word program is at-
tempted when the corresponding block lock-bit is set,
SR.1 and SR.4 will be set to "1".
ACC FAST PROGRAM/ERASE FUNCTIONS
When VPP is between 3.0V and 3.6V, all program and
erase current is drawn through the VCC pin. When ACC
pin is connected to a 12V power supply, the device draws
program and erase current directly from the ACC pin.
This eliminates the need for an external switching tran-
sistor control the voltage VPP.
MX26L6419
REV. 0.3, OCT. 08, 2003

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