hd66712u Renesas Electronics Corporation., hd66712u Datasheet - Page 49

• Manufacturer Part Number: hd66712u
• Description: Dot-matrix Liquid Crystal Display Controller/driver - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

HD66712U
Table 12
Instruction Bit
Set
DDRAM
address
Set scroll
quantity
Read busy
flag &
address
Write data
to RAM
Read data
from RAM
Note:
412
1. — indicates no effect.
2. Extension time changes as frequency changes. For example, when f is 300 kHz, the execution
3. Execution time in a low-power mode (LP = 1 and EXT = low) becomes four times for a 1-line
I/D
I/D
S
D
C
B
FW = 1: 6-dot font width
B/W = 1: Black-white inverting cursor on
NW = 1: Four lines
NW = 0: One or two lines
S/C = 1: Display shift
S/C = 0: Cursor move
R/L = 1: Shift to the right
R/L = 0: Shift to the left
DL
N
RE = 1: Extension register access enable
BE = 1: CGRAM/SEGRAM blinking enable
LP
BF
BF
* After execution of the CGRAM/DDRAM data write or read instruction, the RAM address
RE
0
1
0/1
0/1
0/1
time is: 37 µs
mode, and twice for a 2- or 4-line mode.
counter is incremented or decremented by 1. The RAM address counter is updated after the
busy flag turns off. In Figure 17, t
address counter is updated.
Instructions (cont)
= 1: Increment
= 0: Decrement
= 1: Accompanies display shift
= 1: Display on
= 1: Cursor on
= 1: Blink on
= 1: 8 bits, DL = 0: 4 bits
= 1: 2 lines, N = 0: 1 line
= 1: Low-power mode
= 1: Internally operating
= 0:
RS
0
0
0
1
1
R/
0
0
1
0
1
: :
DB7 DB6 DB5 DB4 DB3
1
1
BF
270/300 = 33 µs.
Instructions acceptable
ADD ADD ADD ADD
*
AC
HDS HDS HDS
AC
Code
AC
Read data
Write data
ADD
AC
is the time elapsed after the busy flag turns off until the
DB2
ADD
HDS
AC
DB1
ADD
HDS
AC
DB0
ADD
HDS
AC
Description
Sets DDRAM address.
Reads busy flag (BF)
DDRAM data is sent and
received after this
setting.
Sets horizontal dot scroll
quantity.
indicating internal
operation is being
performed and reads
address counter
contents.
Writes data into
DDRAM, CGRAM, or
SEGRAM.
Reads data from
DDRAM, CGRAM, or
SEGRAM.
DDRAM:
ADD:
CGRAM:
ACG:
SEGRAM: Segment RAM
ASEG:
HSE:
HDS:
AC:
Display data RAM
DDRAM address
(corresponds
to cursor address)
Character generator RAM
CGRAM address
Segment RAM address
Specifies horizontal scroll
lines
Horizontal dot scroll
quantity
Address counter used for
both DD, CG, and
SEGRAM addresses.
Execution
Time (max)
(when f
f
270 kHz)
37 µs
37 µs
0 µs
7 µs
t
37 µs
t
ADD
ADD
OSC
= 5.5 µs*
= 5.5 µs*
is
cp
or