hd66717 Renesas Electronics Corporation., hd66717 Datasheet - Page 45

• Manufacturer Part Number: hd66717
• Description: Low-power Dot-matrix Liquid Crystal Display Controller/driver -
• Manufacturer: Renesas Electronics Corporation.

HD66717
Clock-Synchronized Serial Interface
Setting the IM1 and IM0 pins (interface mode pins) to the GND and high levels, respectively, allows
standard clock-synchronized serial data transfer, using the chip select (CS*), SDA, and SCL lines. Here,
the HD66717 exclusively receives data.
The HD66717 initiates serial data transfer by transferring the start byte at the falling edge of the CS*
input. It ends serial data transfer at the rising edge of the CS* input.
The HD66717 is selected when the 6-bit chip address in the start byte transferred from the transmitting
device matches the 6-bit (device) identification code assigned to the HD66717. The HD66717, when
selected, receives the subsequent data strings. Any identification code can be assigned by the DB5/ID5 to
DB0/ID0 pins. Two different chip addresses must be assigned to a single HD66717 because the seventh
bit of the start byte is used as a register select bit (RS): when RS = 0, an instruction can be issued and
when RS = 1, data can be written to a RAM. The eighth bit of the start byte must be 0.
After receiving the start byte, the HD66717 receives the subsequent data as an HD66717 instruction or as
RAM data. Data is transferred with the MSB first. To transfer data consecutively, adjust the data transfer
rate so that the HD66717 can complete the current instruction before the eighth bit of the next instruction
is transferred. See Table 17, Instruction List. If the next instruction is received during execution of the
previous instruction, the next instruction will be ignored. Note that the display-clear instruction alone
requires longer execution time than the others.
Figure 23 shows the clock-synchronised serial interface timing sequence.
497