hd66100 Renesas Electronics Corporation., hd66100 Datasheet - Page 88

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hd66100

Manufacturer Part Number
hd66100
Description
H8/3867 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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5. Interrupt request register 2 (IRR2)
IRR2 is an 8-bit read/write register, in which a corresponding flag is set to 1 when a direct
transfer, A/D converter, Timer G, Timer FH, Timer FC, or Timer C interrupt is requested. The
flags are not cleared automatically when an interrupt is accepted. It is necessary to write 0 to clear
each flag.
Bit 7: Direct transfer interrupt request flag (IRRDT)
Bit 7
IRRDT
0
1
Bit 6: A/D converter interrupt request flag (IRRAD)
Bit 6
IRRAD
0
1
Bit 5: Reserved bit
Bit 5 is a readable/writable reserved bit. It is initialized to 0 by a reset.
Bit
Initial value
Read/Write
Note: * Only a write of 0 for flag clearing is possible
Description
Clearing conditions:
When IRRDT = 1, it is cleared by writing 0
Setting conditions:
When a direct transfer is made by executing a SLEEP instruction while DTON = 1 in
SYSCR2
Description
Clearing conditions:
When IRRAD = 1, it is cleared by writing 0
Setting conditions:
When A/D conversion is completed and ADSF is cleared to 0 in ADSR
IRRDT
R/W
7
0
*
IRRAD
R/W
6
0
*
R/W
5
0
IRRTG
R/W
4
0
*
IRRTFH
R/W
3
0
*
IRRTFL
R/W
2
0
*
IRRTC
R/W
1
0
*
(initial value)
(initial value)
IRREC
R/W
0
0
*
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