mx25l1605zmi-20g Macronix International Co., mx25l1605zmi-20g Datasheet - Page 26

no-image

mx25l1605zmi-20g

Manufacturer Part Number
mx25l1605zmi-20g
Description
16m-bit [x 1] Cmos Serial Eliteflashtm Memory
Manufacturer
Macronix International Co.
Datasheet
Figure 15. Read Status Register (RDSR) Instruction Sequence and Data-Out Sequence
Notes: In serial RDID and RDSR mode, output pin SO will be enabled at 8th clock's rising edge. That means, MXIC's drip
will enable output half a cycle in advance compare with other compatible vendor's spec.
Figure 16. Write Status Register (WRSR) Instruction Sequence
Figure 17. Read Data Bytes (READ) Instruction Sequence and Data-Out Sequence
Notes: In READ mode, FAST_READ mode, RES mode and REMS mode, MXIC IC will enable output an entire cycle in
advance compare with other compatible vendor's spec. Detail condition please reference the waveform.
P/N: PM1291
CS#
SCLK
SI
SO
CS#
SCLK
SI
SO
CS#
SCLK
SI
SO
0
0
1
High Impedance
High Impedance
1
2
Instruction
2
3
Instruction
3
4
4
5
0
5
6
1
High Impedance
6
7
2
MSB
Instruction
23
X
7
8
MSB
3
7
22 21
8
9 10
4
24-Bit Address
6
Status Register Out
9 10 11 12 13 14 15
5
5
6
26
4
3
28 29 30 31 32 33 34 35
7
3
MSB
2
7
8
2
1
6
9 10 11 12 13 14 15
1
0
X
5
MSB
Register In
MX25L1605ZM
0
7
4
Status
MSB
7
6
3
6
Status Register Out
5
Data Out 1
2
5
4
1
4
3
36 37 38
0
3
2
2
1
1
0
39
0
7
Data Out 2
7
REV. 1.0, MAY 16, 2006

Related parts for mx25l1605zmi-20g